//===-- X86/Printer.cpp - Convert X86 LLVM code to Intel assembly ---------===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
//
// This file contains a printer that converts from our internal
// representation of machine-dependent LLVM code to Intel-format
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/Mangler.h"
+#include "Support/Statistic.h"
#include "Support/StringExtras.h"
#include "Support/CommandLine.h"
+using namespace llvm;
namespace {
+ Statistic<> EmittedInsts("asm-printer", "Number of machine instrs printed");
+
// FIXME: This should be automatically picked up by autoconf from the C
// frontend
cl::opt<bool> EmitCygwin("enable-cygwin-compatible-output", cl::Hidden,
void printMemReference(const MachineInstr *MI, unsigned Op);
void printConstantPool(MachineConstantPool *MCP);
bool runOnMachineFunction(MachineFunction &F);
- std::string ConstantExprToString(const ConstantExpr* CE);
- std::string valToExprString(const Value* V);
bool doInitialization(Module &M);
bool doFinalization(Module &M);
- void printConstantValueOnly(const Constant* CV);
- void printSingleConstantValue(const Constant* CV);
+ void emitGlobalConstant(const Constant* CV);
+ void emitConstantValueOnly(const Constant *CV);
};
} // end of anonymous namespace
/// using the given target machine description. This should work
/// regardless of whether the function is in SSA form.
///
-FunctionPass *createX86CodePrinterPass(std::ostream &o,TargetMachine &tm){
+FunctionPass *llvm::createX86CodePrinterPass(std::ostream &o,TargetMachine &tm){
return new Printer(o, tm);
}
-/// valToExprString - Helper function for ConstantExprToString().
-/// Appends result to argument string S.
-///
-std::string Printer::valToExprString(const Value* V) {
- std::string S;
- bool failed = false;
- if (const Constant* CV = dyn_cast<Constant>(V)) { // symbolic or known
- if (const ConstantBool *CB = dyn_cast<ConstantBool>(CV))
- S += std::string(CB == ConstantBool::True ? "1" : "0");
- else if (const ConstantSInt *CI = dyn_cast<ConstantSInt>(CV))
- S += itostr(CI->getValue());
- else if (const ConstantUInt *CI = dyn_cast<ConstantUInt>(CV))
- S += utostr(CI->getValue());
- else if (const ConstantFP *CFP = dyn_cast<ConstantFP>(CV))
- S += ftostr(CFP->getValue());
- else if (isa<ConstantPointerNull>(CV))
- S += "0";
- else if (const ConstantPointerRef *CPR = dyn_cast<ConstantPointerRef>(CV))
- S += valToExprString(CPR->getValue());
- else if (const ConstantExpr *CE = dyn_cast<ConstantExpr>(CV))
- S += ConstantExprToString(CE);
- else
- failed = true;
- } else if (const GlobalValue* GV = dyn_cast<GlobalValue>(V)) {
- S += Mang->getValueName(GV);
- }
- else
- failed = true;
-
- if (failed) {
- assert(0 && "Cannot convert value to string");
- S += "<illegal-value>";
- }
- return S;
-}
-
-/// ConstantExprToString - Convert a ConstantExpr to an asm expression
-/// and return this as a string.
-///
-std::string Printer::ConstantExprToString(const ConstantExpr* CE) {
- const TargetData &TD = TM.getTargetData();
- switch(CE->getOpcode()) {
- case Instruction::GetElementPtr:
- { // generate a symbolic expression for the byte address
- const Value* ptrVal = CE->getOperand(0);
- std::vector<Value*> idxVec(CE->op_begin()+1, CE->op_end());
- if (unsigned Offset = TD.getIndexedOffset(ptrVal->getType(), idxVec))
- return "(" + valToExprString(ptrVal) + ") + " + utostr(Offset);
- else
- return valToExprString(ptrVal);
- }
-
- case Instruction::Cast:
- // Support only non-converting or widening casts for now, that is,
- // ones that do not involve a change in value. This assertion is
- // not a complete check.
- {
- Constant *Op = CE->getOperand(0);
- const Type *OpTy = Op->getType(), *Ty = CE->getType();
- assert(((isa<PointerType>(OpTy)
- && (Ty == Type::LongTy || Ty == Type::ULongTy))
- || (isa<PointerType>(Ty)
- && (OpTy == Type::LongTy || OpTy == Type::ULongTy)))
- || (((TD.getTypeSize(Ty) >= TD.getTypeSize(OpTy))
- && (OpTy->isLosslesslyConvertibleTo(Ty))))
- && "FIXME: Don't yet support this kind of constant cast expr");
- return "(" + valToExprString(Op) + ")";
- }
-
- case Instruction::Add:
- return "(" + valToExprString(CE->getOperand(0)) + ") + ("
- + valToExprString(CE->getOperand(1)) + ")";
-
- default:
- assert(0 && "Unsupported operator in ConstantExprToString()");
- return "";
- }
-}
-
-/// printSingleConstantValue - Print a single constant value.
-///
-void
-Printer::printSingleConstantValue(const Constant* CV)
-{
- assert(CV->getType() != Type::VoidTy &&
- CV->getType() != Type::TypeTy &&
- CV->getType() != Type::LabelTy &&
- "Unexpected type for Constant");
-
- assert((!isa<ConstantArray>(CV) && ! isa<ConstantStruct>(CV))
- && "Aggregate types should be handled outside this function");
-
- const Type *type = CV->getType();
- O << "\t";
- switch(type->getPrimitiveID())
- {
- case Type::BoolTyID: case Type::UByteTyID: case Type::SByteTyID:
- O << ".byte";
- break;
- case Type::UShortTyID: case Type::ShortTyID:
- O << ".word";
- break;
- case Type::UIntTyID: case Type::IntTyID: case Type::PointerTyID:
- O << ".long";
- break;
- case Type::ULongTyID: case Type::LongTyID:
- O << ".quad";
- break;
- case Type::FloatTyID:
- O << ".long";
- break;
- case Type::DoubleTyID:
- O << ".quad";
- break;
- case Type::ArrayTyID:
- if ((cast<ArrayType>(type)->getElementType() == Type::UByteTy) ||
- (cast<ArrayType>(type)->getElementType() == Type::SByteTy))
- O << ".string";
- else
- assert (0 && "Can't handle printing this type of array");
- break;
- default:
- assert (0 && "Can't handle printing this type of thing");
- break;
- }
- O << "\t";
-
- if (const ConstantExpr* CE = dyn_cast<ConstantExpr>(CV))
- {
- // Constant expression built from operators, constants, and
- // symbolic addrs
- O << ConstantExprToString(CE) << "\n";
- }
- else if (type->isPrimitiveType())
- {
- if (type->isFloatingPoint()) {
- // FP Constants are printed as integer constants to avoid losing
- // precision...
- double Val = cast<ConstantFP>(CV)->getValue();
- if (type == Type::FloatTy) {
- float FVal = (float)Val;
- char *ProxyPtr = (char*)&FVal; // Abide by C TBAA rules
- O << *(unsigned int*)ProxyPtr;
- } else if (type == Type::DoubleTy) {
- char *ProxyPtr = (char*)&Val; // Abide by C TBAA rules
- O << *(uint64_t*)ProxyPtr;
- } else {
- assert(0 && "Unknown floating point type!");
- }
-
- O << "\t# " << type->getDescription() << " value: " << Val << "\n";
- } else {
- WriteAsOperand(O, CV, false, false) << "\n";
- }
- }
- else if (const ConstantPointerRef* CPR = dyn_cast<ConstantPointerRef>(CV))
- {
- // This is a constant address for a global variable or method.
- // Use the name of the variable or method as the address value.
- O << Mang->getValueName(CPR->getValue()) << "\n";
- }
- else if (isa<ConstantPointerNull>(CV))
- {
- // Null pointer value
- O << "0\n";
- }
- else
- {
- assert(0 && "Unknown elementary type for constant");
- }
-}
-
-/// isStringCompatible - Can we treat the specified array as a string?
-/// Only if it is an array of ubytes or non-negative sbytes.
-///
-static bool isStringCompatible(const ConstantArray *CVA) {
- const Type *ETy = cast<ArrayType>(CVA->getType())->getElementType();
- if (ETy == Type::UByteTy) return true;
- if (ETy != Type::SByteTy) return false;
-
- for (unsigned i = 0; i < CVA->getNumOperands(); ++i)
- if (cast<ConstantSInt>(CVA->getOperand(i))->getValue() < 0)
- return false;
-
- return true;
-}
-
/// toOctal - Convert the low order bits of X into an octal digit.
///
static inline char toOctal(int X) {
/// getAsCString - Return the specified array as a C compatible
/// string, only if the predicate isStringCompatible is true.
///
-static std::string getAsCString(const ConstantArray *CVA) {
- assert(isStringCompatible(CVA) && "Array is not string compatible!");
+static void printAsCString(std::ostream &O, const ConstantArray *CVA) {
+ assert(CVA->isString() && "Array is not string compatible!");
- std::string Result;
- const Type *ETy = cast<ArrayType>(CVA->getType())->getElementType();
- Result = "\"";
- for (unsigned i = 0; i < CVA->getNumOperands(); ++i) {
+ O << "\"";
+ for (unsigned i = 0; i != CVA->getNumOperands(); ++i) {
unsigned char C = cast<ConstantInt>(CVA->getOperand(i))->getRawValue();
if (C == '"') {
- Result += "\\\"";
+ O << "\\\"";
} else if (C == '\\') {
- Result += "\\\\";
+ O << "\\\\";
} else if (isprint(C)) {
- Result += C;
+ O << C;
} else {
switch(C) {
- case '\b': Result += "\\b"; break;
- case '\f': Result += "\\f"; break;
- case '\n': Result += "\\n"; break;
- case '\r': Result += "\\r"; break;
- case '\t': Result += "\\t"; break;
+ case '\b': O << "\\b"; break;
+ case '\f': O << "\\f"; break;
+ case '\n': O << "\\n"; break;
+ case '\r': O << "\\r"; break;
+ case '\t': O << "\\t"; break;
default:
- Result += '\\';
- Result += toOctal(C >> 6);
- Result += toOctal(C >> 3);
- Result += toOctal(C >> 0);
+ O << '\\';
+ O << toOctal(C >> 6);
+ O << toOctal(C >> 3);
+ O << toOctal(C >> 0);
break;
}
}
}
- Result += "\"";
- return Result;
+ O << "\"";
}
-// Print a constant value or values (it may be an aggregate).
-// Uses printSingleConstantValue() to print each individual value.
-void Printer::printConstantValueOnly(const Constant *CV) {
+// Print out the specified constant, without a storage class. Only the
+// constants valid in constant expressions can occur here.
+void Printer::emitConstantValueOnly(const Constant *CV) {
+ if (CV->isNullValue())
+ O << "0";
+ else if (const ConstantBool *CB = dyn_cast<ConstantBool>(CV)) {
+ assert(CB == ConstantBool::True);
+ O << "1";
+ } else if (const ConstantSInt *CI = dyn_cast<ConstantSInt>(CV))
+ O << CI->getValue();
+ else if (const ConstantUInt *CI = dyn_cast<ConstantUInt>(CV))
+ O << CI->getValue();
+ else if (const ConstantPointerRef *CPR = dyn_cast<ConstantPointerRef>(CV))
+ // This is a constant address for a global variable or function. Use the
+ // name of the variable or function as the address value.
+ O << Mang->getValueName(CPR->getValue());
+ else if (const ConstantExpr *CE = dyn_cast<ConstantExpr>(CV)) {
+ const TargetData &TD = TM.getTargetData();
+ switch(CE->getOpcode()) {
+ case Instruction::GetElementPtr: {
+ // generate a symbolic expression for the byte address
+ const Constant *ptrVal = CE->getOperand(0);
+ std::vector<Value*> idxVec(CE->op_begin()+1, CE->op_end());
+ if (unsigned Offset = TD.getIndexedOffset(ptrVal->getType(), idxVec)) {
+ O << "(";
+ emitConstantValueOnly(ptrVal);
+ O << ") + " << Offset;
+ } else {
+ emitConstantValueOnly(ptrVal);
+ }
+ break;
+ }
+ case Instruction::Cast: {
+ // Support only non-converting or widening casts for now, that is, ones
+ // that do not involve a change in value. This assertion is really gross,
+ // and may not even be a complete check.
+ Constant *Op = CE->getOperand(0);
+ const Type *OpTy = Op->getType(), *Ty = CE->getType();
+
+ // Remember, kids, pointers on x86 can be losslessly converted back and
+ // forth into 32-bit or wider integers, regardless of signedness. :-P
+ assert(((isa<PointerType>(OpTy)
+ && (Ty == Type::LongTy || Ty == Type::ULongTy
+ || Ty == Type::IntTy || Ty == Type::UIntTy))
+ || (isa<PointerType>(Ty)
+ && (OpTy == Type::LongTy || OpTy == Type::ULongTy
+ || OpTy == Type::IntTy || OpTy == Type::UIntTy))
+ || (((TD.getTypeSize(Ty) >= TD.getTypeSize(OpTy))
+ && OpTy->isLosslesslyConvertibleTo(Ty))))
+ && "FIXME: Don't yet support this kind of constant cast expr");
+ O << "(";
+ emitConstantValueOnly(Op);
+ O << ")";
+ break;
+ }
+ case Instruction::Add:
+ O << "(";
+ emitConstantValueOnly(CE->getOperand(0));
+ O << ") + (";
+ emitConstantValueOnly(CE->getOperand(1));
+ O << ")";
+ break;
+ default:
+ assert(0 && "Unsupported operator!");
+ }
+ } else {
+ assert(0 && "Unknown constant value!");
+ }
+}
+
+// Print a constant value or values, with the appropriate storage class as a
+// prefix.
+void Printer::emitGlobalConstant(const Constant *CV) {
const TargetData &TD = TM.getTargetData();
if (CV->isNullValue()) {
O << "\t.zero\t " << TD.getTypeSize(CV->getType()) << "\n";
+ return;
} else if (const ConstantArray *CVA = dyn_cast<ConstantArray>(CV)) {
- if (isStringCompatible(CVA)) {
- // print the string alone and return
- O << "\t.string\t" << getAsCString(CVA) << "\n";
+ if (CVA->isString()) {
+ O << "\t.ascii\t";
+ printAsCString(O, CVA);
+ O << "\n";
} else { // Not a string. Print the values in successive locations
const std::vector<Use> &constValues = CVA->getValues();
for (unsigned i=0; i < constValues.size(); i++)
- printConstantValueOnly(cast<Constant>(constValues[i].get()));
+ emitGlobalConstant(cast<Constant>(constValues[i].get()));
}
+ return;
} else if (const ConstantStruct *CVS = dyn_cast<ConstantStruct>(CV)) {
// Print the fields in successive locations. Pad to align if needed!
const StructLayout *cvsLayout = TD.getStructLayout(CVS->getType());
sizeSoFar += fieldSize + padSize;
// Now print the actual field value
- printConstantValueOnly(field);
+ emitGlobalConstant(field);
// Insert the field padding unless it's zero bytes...
- O << "\t.zero\t " << padSize << "\n";
+ if (padSize)
+ O << "\t.zero\t " << padSize << "\n";
}
assert(sizeSoFar == cvsLayout->StructSize &&
"Layout of constant struct may be incorrect!");
- } else
- printSingleConstantValue(CV);
+ return;
+ } else if (const ConstantFP *CFP = dyn_cast<ConstantFP>(CV)) {
+ // FP Constants are printed as integer constants to avoid losing
+ // precision...
+ double Val = CFP->getValue();
+ switch (CFP->getType()->getPrimitiveID()) {
+ default: assert(0 && "Unknown floating point type!");
+ case Type::FloatTyID: {
+ union FU { // Abide by C TBAA rules
+ float FVal;
+ unsigned UVal;
+ } U;
+ U.FVal = Val;
+ O << ".long\t" << U.UVal << "\t# float " << Val << "\n";
+ return;
+ }
+ case Type::DoubleTyID: {
+ union DU { // Abide by C TBAA rules
+ double FVal;
+ uint64_t UVal;
+ } U;
+ U.FVal = Val;
+ O << ".quad\t" << U.UVal << "\t# double " << Val << "\n";
+ return;
+ }
+ }
+ }
+
+ const Type *type = CV->getType();
+ O << "\t";
+ switch (type->getPrimitiveID()) {
+ case Type::BoolTyID: case Type::UByteTyID: case Type::SByteTyID:
+ O << ".byte";
+ break;
+ case Type::UShortTyID: case Type::ShortTyID:
+ O << ".word";
+ break;
+ case Type::FloatTyID: case Type::PointerTyID:
+ case Type::UIntTyID: case Type::IntTyID:
+ O << ".long";
+ break;
+ case Type::DoubleTyID:
+ case Type::ULongTyID: case Type::LongTyID:
+ O << ".quad";
+ break;
+ default:
+ assert (0 && "Can't handle printing this type of thing");
+ break;
+ }
+ O << "\t";
+ emitConstantValueOnly(CV);
+ O << "\n";
}
/// printConstantPool - Print to the current output stream assembly
<< "\n";
O << ".CPI" << CurrentFnName << "_" << i << ":\t\t\t\t\t#"
<< *CP[i] << "\n";
- printConstantValueOnly (CP[i]);
+ emitGlobalConstant(CP[i]);
}
}
II != E; ++II) {
// Print the assembly for the instruction.
O << "\t";
- printMachineInstruction(*II);
+ printMachineInstruction(II);
}
}
}
// FALLTHROUGH
case MachineOperand::MO_MachineRegister:
- if (MO.getReg() < MRegisterInfo::FirstVirtualRegister)
+ if (MRegisterInfo::isPhysicalRegister(MO.getReg()))
// Bug Workaround: See note in Printer::doInitialization about %.
O << "%" << RI.get(MO.getReg()).Name;
else
const TargetInstrInfo &TII = TM.getInstrInfo();
const TargetInstrDescriptor &Desc = TII.get(Opcode);
+ ++EmittedInsts;
switch (Desc.TSFlags & X86II::FormMask) {
case X86II::Pseudo:
// Print pseudo-instructions as comments; either they should have been
}
} else {
unsigned i = 0;
- if (MI->getNumOperands() && (MI->getOperand(0).opIsDefOnly() ||
- MI->getOperand(0).opIsDefAndUse())) {
+ if (MI->getNumOperands() && MI->getOperand(0).isDef()) {
printOp(MI->getOperand(0));
O << " = ";
++i;
for (unsigned e = MI->getNumOperands(); i != e; ++i) {
O << " ";
- if (MI->getOperand(i).opIsDefOnly() ||
- MI->getOperand(i).opIsDefAndUse()) O << "*";
+ if (MI->getOperand(i).isDef()) O << "*";
printOp(MI->getOperand(i));
- if (MI->getOperand(i).opIsDefOnly() ||
- MI->getOperand(i).opIsDefAndUse()) O << "*";
+ if (MI->getOperand(i).isDef()) O << "*";
}
}
O << "\n";
unsigned Reg = MI->getOperand(0).getReg();
- O << TII.getName(MI->getOpCode()) << " ";
+ O << TII.getName(MI->getOpcode()) << " ";
printOp(MI->getOperand(0));
if (MI->getNumOperands() == 2 &&
(!MI->getOperand(1).isRegister() ||
return;
}
case X86II::MRMDestReg: {
- // There are two acceptable forms of MRMDestReg instructions, those with 2,
- // 3 and 4 operands:
+ // There are three forms of MRMDestReg instructions, those with 2
+ // or 3 operands:
//
- // 2 Operands: this is for things like mov that do not read a second input
+ // 2 Operands: this is for things like mov that do not read a
+ // second input.
//
- // 3 Operands: in this form, the first two registers (the destination, and
- // the first operand) should be the same, post register allocation. The 3rd
- // operand is an additional input. This should be for things like add
- // instructions.
+ // 2 Operands: two address instructions which def&use the first
+ // argument and use the second as input.
//
- // 4 Operands: This form is for instructions which are 3 operands forms, but
- // have a constant argument as well.
+ // 3 Operands: in this form, two address instructions are the same
+ // as in 2 but have a constant argument as well.
//
bool isTwoAddr = TII.isTwoAddrInstr(Opcode);
assert(MI->getOperand(0).isRegister() &&
(MI->getNumOperands() == 2 ||
- (isTwoAddr && MI->getOperand(1).isRegister() &&
- MI->getOperand(0).getReg() == MI->getOperand(1).getReg() &&
- (MI->getNumOperands() == 3 ||
- (MI->getNumOperands() == 4 && MI->getOperand(3).isImmediate()))))
+ (MI->getNumOperands() == 3 && MI->getOperand(2).isImmediate()))
&& "Bad format for MRMDestReg!");
- O << TII.getName(MI->getOpCode()) << " ";
+ O << TII.getName(MI->getOpcode()) << " ";
printOp(MI->getOperand(0));
O << ", ";
- printOp(MI->getOperand(1+isTwoAddr));
- if (MI->getNumOperands() == 4) {
+ printOp(MI->getOperand(1));
+ if (MI->getNumOperands() == 3) {
O << ", ";
- printOp(MI->getOperand(3));
+ printOp(MI->getOperand(2));
}
O << "\n";
return;
// These instructions are the same as MRMDestReg, but instead of having a
// register reference for the mod/rm field, it's a memory reference.
//
- assert(isMem(MI, 0) && MI->getNumOperands() == 4+1 &&
- MI->getOperand(4).isRegister() && "Bad format for MRMDestMem!");
+ assert(isMem(MI, 0) &&
+ (MI->getNumOperands() == 4+1 ||
+ (MI->getNumOperands() == 4+2 && MI->getOperand(5).isImmediate()))
+ && "Bad format for MRMDestMem!");
- O << TII.getName(MI->getOpCode()) << " " << sizePtr(Desc) << " ";
+ O << TII.getName(MI->getOpcode()) << " " << sizePtr(Desc) << " ";
printMemReference(MI, 0);
O << ", ";
printOp(MI->getOperand(4));
+ if (MI->getNumOperands() == 4+2) {
+ O << ", ";
+ printOp(MI->getOperand(5));
+ }
O << "\n";
return;
}
case X86II::MRMSrcReg: {
- // There is a two forms that are acceptable for MRMSrcReg instructions,
- // those with 3 and 2 operands:
+ // There are three forms that are acceptable for MRMSrcReg
+ // instructions, those with 2 or 3 operands:
+ //
+ // 2 Operands: this is for things like mov that do not read a
+ // second input.
//
- // 3 Operands: in this form, the last register (the second input) is the
- // ModR/M input. The first two operands should be the same, post register
- // allocation. This is for things like: add r32, r/m32
+ // 2 Operands: in this form, the last register is the ModR/M
+ // input. The first operand is a def&use. This is for things
+ // like: add r32, r/m32
+ //
+ // 3 Operands: in this form, we can have 'INST R1, R2, imm', which is used
+ // for instructions like the IMULrri instructions.
//
- // 2 Operands: this is for things like mov that do not read a second input
//
assert(MI->getOperand(0).isRegister() &&
MI->getOperand(1).isRegister() &&
- (MI->getNumOperands() == 2 ||
- (MI->getNumOperands() == 3 && MI->getOperand(2).isRegister()))
+ (MI->getNumOperands() == 2 ||
+ (MI->getNumOperands() == 3 &&
+ (MI->getOperand(2).isImmediate())))
&& "Bad format for MRMSrcReg!");
- if (MI->getNumOperands() == 3 &&
- MI->getOperand(0).getReg() != MI->getOperand(1).getReg())
- O << "**";
- O << TII.getName(MI->getOpCode()) << " ";
+ O << TII.getName(MI->getOpcode()) << " ";
printOp(MI->getOperand(0));
O << ", ";
- printOp(MI->getOperand(MI->getNumOperands()-1));
+ printOp(MI->getOperand(1));
+ if (MI->getNumOperands() == 3) {
+ O << ", ";
+ printOp(MI->getOperand(2));
+ }
O << "\n";
return;
}
(MI->getNumOperands() == 1+4 && isMem(MI, 1)) ||
(MI->getNumOperands() == 2+4 && MI->getOperand(1).isRegister() &&
isMem(MI, 2))
- && "Bad format for MRMDestReg!");
+ && "Bad format for MRMSrcMem!");
if (MI->getNumOperands() == 2+4 &&
MI->getOperand(0).getReg() != MI->getOperand(1).getReg())
O << "**";
- O << TII.getName(MI->getOpCode()) << " ";
+ O << TII.getName(MI->getOpcode()) << " ";
printOp(MI->getOperand(0));
O << ", " << sizePtr(Desc) << " ";
printMemReference(MI, MI->getNumOperands()-4);
MI->getOperand(0).getReg() != MI->getOperand(1).getReg())
O << "**";
- O << TII.getName(MI->getOpCode()) << " ";
+ O << TII.getName(MI->getOpcode()) << " ";
printOp(MI->getOperand(0));
if (MI->getOperand(MI->getNumOperands()-1).isImmediate()) {
O << ", ";
//
assert(MI->getNumOperands() >= 4 && MI->getNumOperands() <= 5 &&
isMem(MI, 0) && "Bad MRMSxM format!");
- assert((MI->getNumOperands() != 5 || MI->getOperand(4).isImmediate()) &&
+ assert((MI->getNumOperands() != 5 ||
+ (MI->getOperand(4).isImmediate() ||
+ MI->getOperand(4).isGlobalAddress())) &&
"Bad MRMSxM format!");
+
+ const MachineOperand &Op3 = MI->getOperand(3);
+
// Bug: The 80-bit FP store-pop instruction "fstp XWORD PTR [...]"
// is misassembled by gas in intel_syntax mode as its 32-bit
// equivalent "fstp DWORD PTR [...]". Workaround: Output the raw
// opcode bytes instead of the instruction.
- if (MI->getOpCode() == X86::FSTPr80) {
+ if (MI->getOpcode() == X86::FSTPr80) {
if ((MI->getOperand(0).getReg() == X86::ESP)
&& (MI->getOperand(1).getImmedValue() == 1)) {
- int DispVal = MI->getOperand(3).getImmedValue();
- if ((DispVal < -128) || (DispVal > 127)) { // 4 byte disp.
- unsigned int val = (unsigned int) DispVal;
+ if (Op3.isImmediate() &&
+ Op3.getImmedValue() >= -128 && Op3.getImmedValue() <= 127) {
+ // 1 byte disp.
+ O << ".byte 0xdb, 0x7c, 0x24, 0x" << std::hex
+ << ((unsigned)Op3.getImmedValue() & 255) << std::dec << "\t# ";
+ } else {
O << ".byte 0xdb, 0xbc, 0x24\n\t";
- O << ".long 0x" << std::hex << (unsigned) val << std::dec << "\t# ";
- } else { // 1 byte disp.
- unsigned char val = (unsigned char) DispVal;
- O << ".byte 0xdb, 0x7c, 0x24, 0x" << std::hex << (unsigned) val
- << std::dec << "\t# ";
+ O << ".long ";
+ printOp(Op3);
+ O << "\t# ";
}
}
}
+
// Bug: The 80-bit FP load instruction "fld XWORD PTR [...]" is
// misassembled by gas in intel_syntax mode as its 32-bit
// equivalent "fld DWORD PTR [...]". Workaround: Output the raw
// opcode bytes instead of the instruction.
- if (MI->getOpCode() == X86::FLDr80) {
- if ((MI->getOperand(0).getReg() == X86::ESP)
- && (MI->getOperand(1).getImmedValue() == 1)) {
- int DispVal = MI->getOperand(3).getImmedValue();
- if ((DispVal < -128) || (DispVal > 127)) { // 4 byte disp.
- unsigned int val = (unsigned int) DispVal;
- O << ".byte 0xdb, 0xac, 0x24\n\t";
- O << ".long 0x" << std::hex << (unsigned) val << std::dec << "\t# ";
- } else { // 1 byte disp.
- unsigned char val = (unsigned char) DispVal;
- O << ".byte 0xdb, 0x6c, 0x24, 0x" << std::hex << (unsigned) val
- << std::dec << "\t# ";
- }
+ if (MI->getOpcode() == X86::FLDr80 &&
+ MI->getOperand(0).getReg() == X86::ESP &&
+ MI->getOperand(1).getImmedValue() == 1) {
+ if (Op3.isImmediate() && Op3.getImmedValue() >= -128 &&
+ Op3.getImmedValue() <= 127) { // 1 byte displacement
+ O << ".byte 0xdb, 0x6c, 0x24, 0x" << std::hex
+ << ((unsigned)Op3.getImmedValue() & 255) << std::dec << "\t# ";
+ } else {
+ O << ".byte 0xdb, 0xac, 0x24\n\t";
+ O << ".long ";
+ printOp(Op3);
+ O << "\t# ";
}
}
+
// Bug: gas intel_syntax mode treats "fild QWORD PTR [...]" as an
// invalid opcode, saying "64 bit operations are only supported in
// 64 bit modes." libopcodes disassembles it as "fild DWORD PTR
// [...]", which is wrong. Workaround: Output the raw opcode bytes
// instead of the instruction.
- if (MI->getOpCode() == X86::FILDr64) {
- if ((MI->getOperand(0).getReg() == X86::ESP)
- && (MI->getOperand(1).getImmedValue() == 1)) {
- int DispVal = MI->getOperand(3).getImmedValue();
- if ((DispVal < -128) || (DispVal > 127)) { // 4 byte disp.
- unsigned int val = (unsigned int) DispVal;
- O << ".byte 0xdf, 0xac, 0x24\n\t";
- O << ".long 0x" << std::hex << (unsigned) val << std::dec << "\t# ";
- } else { // 1 byte disp.
- unsigned char val = (unsigned char) DispVal;
- O << ".byte 0xdf, 0x6c, 0x24, 0x" << std::hex << (unsigned) val
- << std::dec << "\t# ";
- }
+ if (MI->getOpcode() == X86::FILDr64 &&
+ MI->getOperand(0).getReg() == X86::ESP &&
+ MI->getOperand(1).getImmedValue() == 1) {
+ if (Op3.isImmediate() && Op3.getImmedValue() >= -128 &&
+ Op3.getImmedValue() <= 127) { // 1 byte displacement
+ O << ".byte 0xdf, 0x6c, 0x24, 0x" << std::hex
+ << ((unsigned)Op3.getImmedValue() & 255) << std::dec << "\t# ";
+ } else {
+ O << ".byte 0xdf, 0xac, 0x24\n\t";
+ O << ".long ";
+ printOp(Op3);
+ O << std::dec << "\t# ";
}
}
+
// Bug: gas intel_syntax mode treats "fistp QWORD PTR [...]" as
// an invalid opcode, saying "64 bit operations are only
// supported in 64 bit modes." libopcodes disassembles it as
// "fistpll DWORD PTR [...]", which is wrong. Workaround: Output
// "fistpll DWORD PTR " instead, which is what libopcodes is
// expecting to see.
- if (MI->getOpCode() == X86::FISTPr64) {
+ if (MI->getOpcode() == X86::FISTPr64) {
O << "fistpll DWORD PTR ";
printMemReference(MI, 0);
if (MI->getNumOperands() == 5) {
O << "\t# ";
}
- O << TII.getName(MI->getOpCode()) << " ";
+ O << TII.getName(MI->getOpcode()) << " ";
O << sizePtr(Desc) << " ";
printMemReference(MI, 0);
if (MI->getNumOperands() == 5) {
unsigned Align = TD.getTypeAlignment(C->getType());
if (C->isNullValue() &&
- (I->hasLinkOnceLinkage() || I->hasInternalLinkage())) {
+ (I->hasLinkOnceLinkage() || I->hasInternalLinkage() ||
+ I->hasWeakLinkage() /* FIXME: Verify correct */)) {
SwitchSection(O, CurSection, ".data");
if (I->hasInternalLinkage())
O << "\t.local " << name << "\n";
} else {
switch (I->getLinkage()) {
case GlobalValue::LinkOnceLinkage:
+ case GlobalValue::WeakLinkage: // FIXME: Verify correct for weak.
// Nonnull linkonce -> weak
O << "\t.weak " << name << "\n";
SwitchSection(O, CurSection, "");
O << " = ";
WriteAsOperand(O, C, false, false, &M);
O << "\n";
- printConstantValueOnly(C);
+ emitGlobalConstant(C);
}
}
projects / oota-llvm.git / blobdiff