-//===-- X86/Printer.cpp - Convert X86 LLVM code to Intel assembly ---------===//
-//
+//===-- X86AsmPrinter.cpp - Convert X86 LLVM code to AT&T assembly --------===//
+//
// The LLVM Compiler Infrastructure
//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
-//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
//===----------------------------------------------------------------------===//
//
// This file contains a printer that converts from our internal representation
-// of machine-dependent LLVM code to Intel-format assembly language. This
-// printer is the output mechanism used by `llc' and `lli -print-machineinstrs'
-// on X86.
+// of machine-dependent LLVM code to X86 machine code.
//
//===----------------------------------------------------------------------===//
+#include "X86AsmPrinter.h"
+#include "InstPrinter/X86ATTInstPrinter.h"
+#include "InstPrinter/X86IntelInstPrinter.h"
+#include "X86MCInstLower.h"
#include "X86.h"
-#include "X86InstrInfo.h"
+#include "X86COFFMachineModuleInfo.h"
+#include "X86MachineFunctionInfo.h"
#include "X86TargetMachine.h"
-#include "llvm/Constants.h"
+#include "llvm/CallingConv.h"
#include "llvm/DerivedTypes.h"
#include "llvm/Module.h"
+#include "llvm/Type.h"
+#include "llvm/Analysis/DebugInfo.h"
#include "llvm/Assembly/Writer.h"
-#include "llvm/CodeGen/MachineCodeEmitter.h"
-#include "llvm/CodeGen/MachineConstantPool.h"
-#include "llvm/CodeGen/MachineFunctionPass.h"
-#include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/Target/TargetMachine.h"
-#include "llvm/Support/Mangler.h"
-#include "Support/Statistic.h"
-#include "Support/StringExtras.h"
-#include "Support/CommandLine.h"
+#include "llvm/MC/MCAsmInfo.h"
+#include "llvm/MC/MCContext.h"
+#include "llvm/MC/MCExpr.h"
+#include "llvm/MC/MCSectionMachO.h"
+#include "llvm/MC/MCStreamer.h"
+#include "llvm/MC/MCSymbol.h"
+#include "llvm/CodeGen/MachineJumpTableInfo.h"
+#include "llvm/CodeGen/MachineModuleInfoImpls.h"
+#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
+#include "llvm/Support/COFF.h"
+#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Target/Mangler.h"
+#include "llvm/Target/TargetOptions.h"
+#include "llvm/Target/TargetRegistry.h"
+#include "llvm/ADT/SmallString.h"
using namespace llvm;
-namespace {
- Statistic<> EmittedInsts("asm-printer", "Number of machine instrs printed");
-
- // FIXME: This should be automatically picked up by autoconf from the C
- // frontend
- cl::opt<bool> EmitCygwin("enable-cygwin-compatible-output", cl::Hidden,
- cl::desc("Emit X86 assembly code suitable for consumption by cygwin"));
-
- struct GasBugWorkaroundEmitter : public MachineCodeEmitter {
- GasBugWorkaroundEmitter(std::ostream& o)
- : O(o), OldFlags(O.flags()), firstByte(true) {
- O << std::hex;
- }
-
- ~GasBugWorkaroundEmitter() {
- O.flags(OldFlags);
- O << "\t# ";
- }
+//===----------------------------------------------------------------------===//
+// Primitive Helper Functions.
+//===----------------------------------------------------------------------===//
- virtual void emitByte(unsigned char B) {
- if (!firstByte) O << "\n\t";
- firstByte = false;
- O << ".byte 0x" << (unsigned) B;
- }
+/// runOnMachineFunction - Emit the function body.
+///
+bool X86AsmPrinter::runOnMachineFunction(MachineFunction &MF) {
+ SetupMachineFunction(MF);
+
+ if (Subtarget->isTargetCOFF()) {
+ bool Intrn = MF.getFunction()->hasInternalLinkage();
+ OutStreamer.BeginCOFFSymbolDef(CurrentFnSym);
+ OutStreamer.EmitCOFFSymbolStorageClass(Intrn ? COFF::IMAGE_SYM_CLASS_STATIC
+ : COFF::IMAGE_SYM_CLASS_EXTERNAL);
+ OutStreamer.EmitCOFFSymbolType(COFF::IMAGE_SYM_DTYPE_FUNCTION
+ << COFF::SCT_COMPLEX_TYPE_SHIFT);
+ OutStreamer.EndCOFFSymbolDef();
+ }
- // These should never be called
- virtual void emitWord(unsigned W) { assert(0); }
- virtual uint64_t getGlobalValueAddress(GlobalValue *V) { abort(); }
- virtual uint64_t getGlobalValueAddress(const std::string &Name) { abort(); }
- virtual uint64_t getConstantPoolEntryAddress(unsigned Index) { abort(); }
- virtual uint64_t getCurrentPCValue() { abort(); }
- virtual uint64_t forceCompilationOf(Function *F) { abort(); }
-
- private:
- std::ostream& O;
- std::ios::fmtflags OldFlags;
- bool firstByte;
- };
-
- struct Printer : public MachineFunctionPass {
- /// Output stream on which we're printing assembly code.
- ///
- std::ostream &O;
-
- /// Target machine description which we query for reg. names, data
- /// layout, etc.
- ///
- TargetMachine &TM;
-
- /// Name-mangler for global names.
- ///
- Mangler *Mang;
-
- Printer(std::ostream &o, TargetMachine &tm) : O(o), TM(tm) { }
-
- /// Cache of mangled name for current function. This is
- /// recalculated at the beginning of each call to
- /// runOnMachineFunction().
- ///
- std::string CurrentFnName;
-
- virtual const char *getPassName() const {
- return "X86 Assembly Printer";
- }
+ // Have common code print out the function header with linkage info etc.
+ EmitFunctionHeader();
- void printImplUsesBefore(const TargetInstrDescriptor &Desc);
- bool printImplDefsBefore(const TargetInstrDescriptor &Desc);
- bool printImplUsesAfter(const TargetInstrDescriptor &Desc, const bool LC);
- bool printImplDefsAfter(const TargetInstrDescriptor &Desc, const bool LC);
- void printMachineInstruction(const MachineInstr *MI);
- void printOp(const MachineOperand &MO, bool elideOffsetKeyword = false);
- void printMemReference(const MachineInstr *MI, unsigned Op);
- void printConstantPool(MachineConstantPool *MCP);
- bool runOnMachineFunction(MachineFunction &F);
- bool doInitialization(Module &M);
- bool doFinalization(Module &M);
- void emitGlobalConstant(const Constant* CV);
- void emitConstantValueOnly(const Constant *CV);
- };
-} // end of anonymous namespace
-
-/// createX86CodePrinterPass - Returns a pass that prints the X86
-/// assembly code for a MachineFunction to the given output stream,
-/// using the given target machine description. This should work
-/// regardless of whether the function is in SSA form.
-///
-FunctionPass *llvm::createX86CodePrinterPass(std::ostream &o,TargetMachine &tm){
- return new Printer(o, tm);
-}
+ // Emit the rest of the function body.
+ EmitFunctionBody();
-/// toOctal - Convert the low order bits of X into an octal digit.
-///
-static inline char toOctal(int X) {
- return (X&7)+'0';
+ // We didn't modify anything.
+ return false;
}
-/// getAsCString - Return the specified array as a C compatible
-/// string, only if the predicate isStringCompatible is true.
-///
-static void printAsCString(std::ostream &O, const ConstantArray *CVA) {
- assert(CVA->isString() && "Array is not string compatible!");
-
- O << "\"";
- for (unsigned i = 0; i != CVA->getNumOperands(); ++i) {
- unsigned char C = cast<ConstantInt>(CVA->getOperand(i))->getRawValue();
-
- if (C == '"') {
- O << "\\\"";
- } else if (C == '\\') {
- O << "\\\\";
- } else if (isprint(C)) {
- O << C;
- } else {
- switch(C) {
- case '\b': O << "\\b"; break;
- case '\f': O << "\\f"; break;
- case '\n': O << "\\n"; break;
- case '\r': O << "\\r"; break;
- case '\t': O << "\\t"; break;
- default:
- O << '\\';
- O << toOctal(C >> 6);
- O << toOctal(C >> 3);
- O << toOctal(C >> 0);
- break;
- }
+/// printSymbolOperand - Print a raw symbol reference operand. This handles
+/// jump tables, constant pools, global address and external symbols, all of
+/// which print to a label with various suffixes for relocation types etc.
+void X86AsmPrinter::printSymbolOperand(const MachineOperand &MO,
+ raw_ostream &O) {
+ switch (MO.getType()) {
+ default: llvm_unreachable("unknown symbol type!");
+ case MachineOperand::MO_JumpTableIndex:
+ O << *GetJTISymbol(MO.getIndex());
+ break;
+ case MachineOperand::MO_ConstantPoolIndex:
+ O << *GetCPISymbol(MO.getIndex());
+ printOffset(MO.getOffset(), O);
+ break;
+ case MachineOperand::MO_GlobalAddress: {
+ const GlobalValue *GV = MO.getGlobal();
+
+ MCSymbol *GVSym;
+ if (MO.getTargetFlags() == X86II::MO_DARWIN_STUB)
+ GVSym = GetSymbolWithGlobalValueBase(GV, "$stub");
+ else if (MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY ||
+ MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY_PIC_BASE ||
+ MO.getTargetFlags() == X86II::MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE)
+ GVSym = GetSymbolWithGlobalValueBase(GV, "$non_lazy_ptr");
+ else
+ GVSym = Mang->getSymbol(GV);
+
+ // Handle dllimport linkage.
+ if (MO.getTargetFlags() == X86II::MO_DLLIMPORT)
+ GVSym = OutContext.GetOrCreateSymbol(Twine("__imp_") + GVSym->getName());
+
+ if (MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY ||
+ MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY_PIC_BASE) {
+ MCSymbol *Sym = GetSymbolWithGlobalValueBase(GV, "$non_lazy_ptr");
+ MachineModuleInfoImpl::StubValueTy &StubSym =
+ MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry(Sym);
+ if (StubSym.getPointer() == 0)
+ StubSym = MachineModuleInfoImpl::
+ StubValueTy(Mang->getSymbol(GV), !GV->hasInternalLinkage());
+ } else if (MO.getTargetFlags() == X86II::MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE){
+ MCSymbol *Sym = GetSymbolWithGlobalValueBase(GV, "$non_lazy_ptr");
+ MachineModuleInfoImpl::StubValueTy &StubSym =
+ MMI->getObjFileInfo<MachineModuleInfoMachO>().getHiddenGVStubEntry(Sym);
+ if (StubSym.getPointer() == 0)
+ StubSym = MachineModuleInfoImpl::
+ StubValueTy(Mang->getSymbol(GV), !GV->hasInternalLinkage());
+ } else if (MO.getTargetFlags() == X86II::MO_DARWIN_STUB) {
+ MCSymbol *Sym = GetSymbolWithGlobalValueBase(GV, "$stub");
+ MachineModuleInfoImpl::StubValueTy &StubSym =
+ MMI->getObjFileInfo<MachineModuleInfoMachO>().getFnStubEntry(Sym);
+ if (StubSym.getPointer() == 0)
+ StubSym = MachineModuleInfoImpl::
+ StubValueTy(Mang->getSymbol(GV), !GV->hasInternalLinkage());
}
- }
- O << "\"";
-}
-// Print out the specified constant, without a storage class. Only the
-// constants valid in constant expressions can occur here.
-void Printer::emitConstantValueOnly(const Constant *CV) {
- if (CV->isNullValue())
- O << "0";
- else if (const ConstantBool *CB = dyn_cast<ConstantBool>(CV)) {
- assert(CB == ConstantBool::True);
- O << "1";
- } else if (const ConstantSInt *CI = dyn_cast<ConstantSInt>(CV))
- if (((CI->getValue() << 32) >> 32) == CI->getValue())
- O << CI->getValue();
+ // If the name begins with a dollar-sign, enclose it in parens. We do this
+ // to avoid having it look like an integer immediate to the assembler.
+ if (GVSym->getName()[0] != '$')
+ O << *GVSym;
else
- O << (unsigned long long)CI->getValue();
- else if (const ConstantUInt *CI = dyn_cast<ConstantUInt>(CV))
- O << CI->getValue();
- else if (const ConstantPointerRef *CPR = dyn_cast<ConstantPointerRef>(CV))
- // This is a constant address for a global variable or function. Use the
- // name of the variable or function as the address value.
- O << Mang->getValueName(CPR->getValue());
- else if (const ConstantExpr *CE = dyn_cast<ConstantExpr>(CV)) {
- const TargetData &TD = TM.getTargetData();
- switch(CE->getOpcode()) {
- case Instruction::GetElementPtr: {
- // generate a symbolic expression for the byte address
- const Constant *ptrVal = CE->getOperand(0);
- std::vector<Value*> idxVec(CE->op_begin()+1, CE->op_end());
- if (unsigned Offset = TD.getIndexedOffset(ptrVal->getType(), idxVec)) {
- O << "(";
- emitConstantValueOnly(ptrVal);
- O << ") + " << Offset;
- } else {
- emitConstantValueOnly(ptrVal);
+ O << '(' << *GVSym << ')';
+ printOffset(MO.getOffset(), O);
+ break;
+ }
+ case MachineOperand::MO_ExternalSymbol: {
+ const MCSymbol *SymToPrint;
+ if (MO.getTargetFlags() == X86II::MO_DARWIN_STUB) {
+ SmallString<128> TempNameStr;
+ TempNameStr += StringRef(MO.getSymbolName());
+ TempNameStr += StringRef("$stub");
+
+ MCSymbol *Sym = GetExternalSymbolSymbol(TempNameStr.str());
+ MachineModuleInfoImpl::StubValueTy &StubSym =
+ MMI->getObjFileInfo<MachineModuleInfoMachO>().getFnStubEntry(Sym);
+ if (StubSym.getPointer() == 0) {
+ TempNameStr.erase(TempNameStr.end()-5, TempNameStr.end());
+ StubSym = MachineModuleInfoImpl::
+ StubValueTy(OutContext.GetOrCreateSymbol(TempNameStr.str()),
+ true);
}
- break;
- }
- case Instruction::Cast: {
- // Support only non-converting or widening casts for now, that is, ones
- // that do not involve a change in value. This assertion is really gross,
- // and may not even be a complete check.
- Constant *Op = CE->getOperand(0);
- const Type *OpTy = Op->getType(), *Ty = CE->getType();
-
- // Remember, kids, pointers on x86 can be losslessly converted back and
- // forth into 32-bit or wider integers, regardless of signedness. :-P
- assert(((isa<PointerType>(OpTy)
- && (Ty == Type::LongTy || Ty == Type::ULongTy
- || Ty == Type::IntTy || Ty == Type::UIntTy))
- || (isa<PointerType>(Ty)
- && (OpTy == Type::LongTy || OpTy == Type::ULongTy
- || OpTy == Type::IntTy || OpTy == Type::UIntTy))
- || (((TD.getTypeSize(Ty) >= TD.getTypeSize(OpTy))
- && OpTy->isLosslesslyConvertibleTo(Ty))))
- && "FIXME: Don't yet support this kind of constant cast expr");
- O << "(";
- emitConstantValueOnly(Op);
- O << ")";
- break;
- }
- case Instruction::Add:
- O << "(";
- emitConstantValueOnly(CE->getOperand(0));
- O << ") + (";
- emitConstantValueOnly(CE->getOperand(1));
- O << ")";
- break;
- default:
- assert(0 && "Unsupported operator!");
+ SymToPrint = StubSym.getPointer();
+ } else {
+ SymToPrint = GetExternalSymbolSymbol(MO.getSymbolName());
}
- } else {
- assert(0 && "Unknown constant value!");
- }
-}
-// Print a constant value or values, with the appropriate storage class as a
-// prefix.
-void Printer::emitGlobalConstant(const Constant *CV) {
- const TargetData &TD = TM.getTargetData();
-
- if (CV->isNullValue()) {
- O << "\t.zero\t " << TD.getTypeSize(CV->getType()) << "\n";
- return;
- } else if (const ConstantArray *CVA = dyn_cast<ConstantArray>(CV)) {
- if (CVA->isString()) {
- O << "\t.ascii\t";
- printAsCString(O, CVA);
- O << "\n";
- } else { // Not a string. Print the values in successive locations
- const std::vector<Use> &constValues = CVA->getValues();
- for (unsigned i=0; i < constValues.size(); i++)
- emitGlobalConstant(cast<Constant>(constValues[i].get()));
- }
- return;
- } else if (const ConstantStruct *CVS = dyn_cast<ConstantStruct>(CV)) {
- // Print the fields in successive locations. Pad to align if needed!
- const StructLayout *cvsLayout = TD.getStructLayout(CVS->getType());
- const std::vector<Use>& constValues = CVS->getValues();
- unsigned sizeSoFar = 0;
- for (unsigned i=0, N = constValues.size(); i < N; i++) {
- const Constant* field = cast<Constant>(constValues[i].get());
-
- // Check if padding is needed and insert one or more 0s.
- unsigned fieldSize = TD.getTypeSize(field->getType());
- unsigned padSize = ((i == N-1? cvsLayout->StructSize
- : cvsLayout->MemberOffsets[i+1])
- - cvsLayout->MemberOffsets[i]) - fieldSize;
- sizeSoFar += fieldSize + padSize;
-
- // Now print the actual field value
- emitGlobalConstant(field);
-
- // Insert the field padding unless it's zero bytes...
- if (padSize)
- O << "\t.zero\t " << padSize << "\n";
- }
- assert(sizeSoFar == cvsLayout->StructSize &&
- "Layout of constant struct may be incorrect!");
- return;
- } else if (const ConstantFP *CFP = dyn_cast<ConstantFP>(CV)) {
- // FP Constants are printed as integer constants to avoid losing
- // precision...
- double Val = CFP->getValue();
- switch (CFP->getType()->getTypeID()) {
- default: assert(0 && "Unknown floating point type!");
- case Type::FloatTyID: {
- union FU { // Abide by C TBAA rules
- float FVal;
- unsigned UVal;
- } U;
- U.FVal = Val;
- O << ".long\t" << U.UVal << "\t# float " << Val << "\n";
- return;
- }
- case Type::DoubleTyID: {
- union DU { // Abide by C TBAA rules
- double FVal;
- uint64_t UVal;
- } U;
- U.FVal = Val;
- O << ".quad\t" << U.UVal << "\t# double " << Val << "\n";
- return;
- }
- }
+ // If the name begins with a dollar-sign, enclose it in parens. We do this
+ // to avoid having it look like an integer immediate to the assembler.
+ if (SymToPrint->getName()[0] != '$')
+ O << *SymToPrint;
+ else
+ O << '(' << *SymToPrint << '(';
+ break;
+ }
}
- const Type *type = CV->getType();
- O << "\t";
- switch (type->getTypeID()) {
- case Type::BoolTyID: case Type::UByteTyID: case Type::SByteTyID:
- O << ".byte";
+ switch (MO.getTargetFlags()) {
+ default:
+ llvm_unreachable("Unknown target flag on GV operand");
+ case X86II::MO_NO_FLAG: // No flag.
break;
- case Type::UShortTyID: case Type::ShortTyID:
- O << ".word";
+ case X86II::MO_DARWIN_NONLAZY:
+ case X86II::MO_DLLIMPORT:
+ case X86II::MO_DARWIN_STUB:
+ // These affect the name of the symbol, not any suffix.
break;
- case Type::FloatTyID: case Type::PointerTyID:
- case Type::UIntTyID: case Type::IntTyID:
- O << ".long";
+ case X86II::MO_GOT_ABSOLUTE_ADDRESS:
+ O << " + [.-" << *MF->getPICBaseSymbol() << ']';
break;
- case Type::DoubleTyID:
- case Type::ULongTyID: case Type::LongTyID:
- O << ".quad";
+ case X86II::MO_PIC_BASE_OFFSET:
+ case X86II::MO_DARWIN_NONLAZY_PIC_BASE:
+ case X86II::MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE:
+ O << '-' << *MF->getPICBaseSymbol();
break;
- default:
- assert (0 && "Can't handle printing this type of thing");
+ case X86II::MO_TLSGD: O << "@TLSGD"; break;
+ case X86II::MO_GOTTPOFF: O << "@GOTTPOFF"; break;
+ case X86II::MO_INDNTPOFF: O << "@INDNTPOFF"; break;
+ case X86II::MO_TPOFF: O << "@TPOFF"; break;
+ case X86II::MO_NTPOFF: O << "@NTPOFF"; break;
+ case X86II::MO_GOTPCREL: O << "@GOTPCREL"; break;
+ case X86II::MO_GOT: O << "@GOT"; break;
+ case X86II::MO_GOTOFF: O << "@GOTOFF"; break;
+ case X86II::MO_PLT: O << "@PLT"; break;
+ case X86II::MO_TLVP: O << "@TLVP"; break;
+ case X86II::MO_TLVP_PIC_BASE:
+ O << "@TLVP" << '-' << *MF->getPICBaseSymbol();
break;
}
- O << "\t";
- emitConstantValueOnly(CV);
- O << "\n";
}
-/// printConstantPool - Print to the current output stream assembly
-/// representations of the constants in the constant pool MCP. This is
-/// used to print out constants which have been "spilled to memory" by
-/// the code generator.
-///
-void Printer::printConstantPool(MachineConstantPool *MCP) {
- const std::vector<Constant*> &CP = MCP->getConstants();
- const TargetData &TD = TM.getTargetData();
-
- if (CP.empty()) return;
-
- for (unsigned i = 0, e = CP.size(); i != e; ++i) {
- O << "\t.section .rodata\n";
- O << "\t.align " << (unsigned)TD.getTypeAlignment(CP[i]->getType())
- << "\n";
- O << ".CPI" << CurrentFnName << "_" << i << ":\t\t\t\t\t#"
- << *CP[i] << "\n";
- emitGlobalConstant(CP[i]);
+/// print_pcrel_imm - This is used to print an immediate value that ends up
+/// being encoded as a pc-relative value. These print slightly differently, for
+/// example, a $ is not emitted.
+void X86AsmPrinter::print_pcrel_imm(const MachineInstr *MI, unsigned OpNo,
+ raw_ostream &O) {
+ const MachineOperand &MO = MI->getOperand(OpNo);
+ switch (MO.getType()) {
+ default: llvm_unreachable("Unknown pcrel immediate operand");
+ case MachineOperand::MO_Register:
+ // pc-relativeness was handled when computing the value in the reg.
+ printOperand(MI, OpNo, O);
+ return;
+ case MachineOperand::MO_Immediate:
+ O << MO.getImm();
+ return;
+ case MachineOperand::MO_MachineBasicBlock:
+ O << *MO.getMBB()->getSymbol();
+ return;
+ case MachineOperand::MO_GlobalAddress:
+ case MachineOperand::MO_ExternalSymbol:
+ printSymbolOperand(MO, O);
+ return;
}
}
-/// runOnMachineFunction - This uses the printMachineInstruction()
-/// method to print assembly for each instruction.
-///
-bool Printer::runOnMachineFunction(MachineFunction &MF) {
- O << "\n\n";
- // What's my mangled name?
- CurrentFnName = Mang->getValueName(MF.getFunction());
-
- // Print out constants referenced by the function
- printConstantPool(MF.getConstantPool());
-
- // Print out labels for the function.
- O << "\t.text\n";
- O << "\t.align 16\n";
- O << "\t.globl\t" << CurrentFnName << "\n";
- if (!EmitCygwin)
- O << "\t.type\t" << CurrentFnName << ", @function\n";
- O << CurrentFnName << ":\n";
-
- // Print out code for the function.
- for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
- I != E; ++I) {
- // Print a label for the basic block.
- O << ".LBB" << CurrentFnName << "_" << I->getNumber() << ":\t# "
- << I->getBasicBlock()->getName() << "\n";
- for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
- II != E; ++II) {
- // Print the assembly for the instruction.
- O << "\t";
- printMachineInstruction(II);
- }
- }
- // We didn't modify anything.
- return false;
-}
-
-static bool isScale(const MachineOperand &MO) {
- return MO.isImmediate() &&
- (MO.getImmedValue() == 1 || MO.getImmedValue() == 2 ||
- MO.getImmedValue() == 4 || MO.getImmedValue() == 8);
-}
-
-static bool isMem(const MachineInstr *MI, unsigned Op) {
- if (MI->getOperand(Op).isFrameIndex()) return true;
- if (MI->getOperand(Op).isConstantPoolIndex()) return true;
- return Op+4 <= MI->getNumOperands() &&
- MI->getOperand(Op ).isRegister() &&isScale(MI->getOperand(Op+1)) &&
- MI->getOperand(Op+2).isRegister() &&MI->getOperand(Op+3).isImmediate();
-}
-
-
-
-void Printer::printOp(const MachineOperand &MO,
- bool elideOffsetKeyword /* = false */) {
- const MRegisterInfo &RI = *TM.getRegisterInfo();
+void X86AsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
+ raw_ostream &O, const char *Modifier) {
+ const MachineOperand &MO = MI->getOperand(OpNo);
switch (MO.getType()) {
- case MachineOperand::MO_VirtualRegister:
- if (Value *V = MO.getVRegValueOrNull()) {
- O << "<" << V->getName() << ">";
- return;
+ default: llvm_unreachable("unknown operand type!");
+ case MachineOperand::MO_Register: {
+ O << '%';
+ unsigned Reg = MO.getReg();
+ if (Modifier && strncmp(Modifier, "subreg", strlen("subreg")) == 0) {
+ EVT VT = (strcmp(Modifier+6,"64") == 0) ?
+ MVT::i64 : ((strcmp(Modifier+6, "32") == 0) ? MVT::i32 :
+ ((strcmp(Modifier+6,"16") == 0) ? MVT::i16 : MVT::i8));
+ Reg = getX86SubSuperRegister(Reg, VT);
}
- // FALLTHROUGH
- case MachineOperand::MO_MachineRegister:
- if (MRegisterInfo::isPhysicalRegister(MO.getReg()))
- // Bug Workaround: See note in Printer::doInitialization about %.
- O << "%" << RI.get(MO.getReg()).Name;
- else
- O << "%reg" << MO.getReg();
- return;
-
- case MachineOperand::MO_SignExtendedImmed:
- case MachineOperand::MO_UnextendedImmed:
- O << (int)MO.getImmedValue();
- return;
- case MachineOperand::MO_MachineBasicBlock: {
- MachineBasicBlock *MBBOp = MO.getMachineBasicBlock();
- O << ".LBB" << Mang->getValueName(MBBOp->getParent()->getFunction())
- << "_" << MBBOp->getNumber () << "\t# "
- << MBBOp->getBasicBlock ()->getName ();
+ O << X86ATTInstPrinter::getRegisterName(Reg);
return;
}
- case MachineOperand::MO_PCRelativeDisp:
- std::cerr << "Shouldn't use addPCDisp() when building X86 MachineInstrs";
- abort ();
+
+ case MachineOperand::MO_Immediate:
+ O << '$' << MO.getImm();
return;
+
+ case MachineOperand::MO_JumpTableIndex:
+ case MachineOperand::MO_ConstantPoolIndex:
case MachineOperand::MO_GlobalAddress:
- if (!elideOffsetKeyword)
- O << "OFFSET ";
- O << Mang->getValueName(MO.getGlobal());
- return;
- case MachineOperand::MO_ExternalSymbol:
- O << MO.getSymbolName();
- return;
- default:
- O << "<unknown operand type>"; return;
+ case MachineOperand::MO_ExternalSymbol: {
+ O << '$';
+ printSymbolOperand(MO, O);
+ break;
}
-}
-
-static const char* const sizePtr(const TargetInstrDescriptor &Desc) {
- switch (Desc.TSFlags & X86II::MemMask) {
- default: assert(0 && "Unknown arg size!");
- case X86II::Mem8: return "BYTE PTR";
- case X86II::Mem16: return "WORD PTR";
- case X86II::Mem32: return "DWORD PTR";
- case X86II::Mem64: return "QWORD PTR";
- case X86II::Mem80: return "XWORD PTR";
}
}
-void Printer::printMemReference(const MachineInstr *MI, unsigned Op) {
- assert(isMem(MI, Op) && "Invalid memory reference!");
-
- if (MI->getOperand(Op).isFrameIndex()) {
- O << "[frame slot #" << MI->getOperand(Op).getFrameIndex();
- if (MI->getOperand(Op+3).getImmedValue())
- O << " + " << MI->getOperand(Op+3).getImmedValue();
- O << "]";
- return;
- } else if (MI->getOperand(Op).isConstantPoolIndex()) {
- O << "[.CPI" << CurrentFnName << "_"
- << MI->getOperand(Op).getConstantPoolIndex();
- if (MI->getOperand(Op+3).getImmedValue())
- O << " + " << MI->getOperand(Op+3).getImmedValue();
- O << "]";
- return;
+void X86AsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op,
+ raw_ostream &O) {
+ unsigned char value = MI->getOperand(Op).getImm();
+ assert(value <= 7 && "Invalid ssecc argument!");
+ switch (value) {
+ case 0: O << "eq"; break;
+ case 1: O << "lt"; break;
+ case 2: O << "le"; break;
+ case 3: O << "unord"; break;
+ case 4: O << "neq"; break;
+ case 5: O << "nlt"; break;
+ case 6: O << "nle"; break;
+ case 7: O << "ord"; break;
}
+}
+void X86AsmPrinter::printLeaMemReference(const MachineInstr *MI, unsigned Op,
+ raw_ostream &O, const char *Modifier) {
const MachineOperand &BaseReg = MI->getOperand(Op);
- int ScaleVal = MI->getOperand(Op+1).getImmedValue();
const MachineOperand &IndexReg = MI->getOperand(Op+2);
- int DispVal = MI->getOperand(Op+3).getImmedValue();
+ const MachineOperand &DispSpec = MI->getOperand(Op+3);
- O << "[";
- bool NeedPlus = false;
- if (BaseReg.getReg()) {
- printOp(BaseReg);
- NeedPlus = true;
- }
+ // If we really don't want to print out (rip), don't.
+ bool HasBaseReg = BaseReg.getReg() != 0;
+ if (HasBaseReg && Modifier && !strcmp(Modifier, "no-rip") &&
+ BaseReg.getReg() == X86::RIP)
+ HasBaseReg = false;
- if (IndexReg.getReg()) {
- if (NeedPlus) O << " + ";
- if (ScaleVal != 1)
- O << ScaleVal << "*";
- printOp(IndexReg);
- NeedPlus = true;
- }
+ // HasParenPart - True if we will print out the () part of the mem ref.
+ bool HasParenPart = IndexReg.getReg() || HasBaseReg;
- if (DispVal) {
- if (NeedPlus)
- if (DispVal > 0)
- O << " + ";
- else {
- O << " - ";
- DispVal = -DispVal;
- }
- O << DispVal;
+ if (DispSpec.isImm()) {
+ int DispVal = DispSpec.getImm();
+ if (DispVal || !HasParenPart)
+ O << DispVal;
+ } else {
+ assert(DispSpec.isGlobal() || DispSpec.isCPI() ||
+ DispSpec.isJTI() || DispSpec.isSymbol());
+ printSymbolOperand(MI->getOperand(Op+3), O);
}
- O << "]";
-}
+ if (HasParenPart) {
+ assert(IndexReg.getReg() != X86::ESP &&
+ "X86 doesn't allow scaling by ESP");
-/// printImplUsesBefore - Emit the implicit-use registers for the instruction
-/// described by DESC, if its PrintImplUsesBefore flag is set.
-///
-void Printer::printImplUsesBefore(const TargetInstrDescriptor &Desc) {
- const MRegisterInfo &RI = *TM.getRegisterInfo();
- if (Desc.TSFlags & X86II::PrintImplUsesBefore) {
- for (const unsigned *p = Desc.ImplicitUses; *p; ++p) {
- // Bug Workaround: See note in Printer::doInitialization about %.
- O << "%" << RI.get(*p).Name << ", ";
+ O << '(';
+ if (HasBaseReg)
+ printOperand(MI, Op, O, Modifier);
+
+ if (IndexReg.getReg()) {
+ O << ',';
+ printOperand(MI, Op+2, O, Modifier);
+ unsigned ScaleVal = MI->getOperand(Op+1).getImm();
+ if (ScaleVal != 1)
+ O << ',' << ScaleVal;
}
+ O << ')';
}
}
-/// printImplDefsBefore - Emit the implicit-def registers for the instruction
-/// described by DESC, if its PrintImplUsesBefore flag is set. Return true if
-/// we printed any registers.
-///
-bool Printer::printImplDefsBefore(const TargetInstrDescriptor &Desc) {
- bool Printed = false;
- const MRegisterInfo &RI = *TM.getRegisterInfo();
- if (Desc.TSFlags & X86II::PrintImplDefsBefore) {
- const unsigned *p = Desc.ImplicitDefs;
- if (*p) {
- O << (Printed ? ", %" : "%") << RI.get (*p).Name;
- Printed = true;
- ++p;
- }
- while (*p) {
- // Bug Workaround: See note in Printer::doInitialization about %.
- O << ", %" << RI.get(*p).Name;
- ++p;
- }
+void X86AsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op,
+ raw_ostream &O, const char *Modifier) {
+ assert(isMem(MI, Op) && "Invalid memory reference!");
+ const MachineOperand &Segment = MI->getOperand(Op+4);
+ if (Segment.getReg()) {
+ printOperand(MI, Op+4, O, Modifier);
+ O << ':';
}
- return Printed;
+ printLeaMemReference(MI, Op, O, Modifier);
}
+void X86AsmPrinter::printPICLabel(const MachineInstr *MI, unsigned Op,
+ raw_ostream &O) {
+ O << *MF->getPICBaseSymbol() << '\n';
+ O << *MF->getPICBaseSymbol() << ':';
+}
-/// printImplUsesAfter - Emit the implicit-use registers for the instruction
-/// described by DESC, if its PrintImplUsesAfter flag is set.
-///
-/// Inputs:
-/// Comma - List of registers will need a leading comma.
-/// Desc - Description of the Instruction.
-///
-/// Return value:
-/// true - Emitted one or more registers.
-/// false - Emitted no registers.
-///
-bool Printer::printImplUsesAfter(const TargetInstrDescriptor &Desc,
- const bool Comma = true) {
- const MRegisterInfo &RI = *TM.getRegisterInfo();
- if (Desc.TSFlags & X86II::PrintImplUsesAfter) {
- bool emitted = false;
- const unsigned *p = Desc.ImplicitUses;
- if (*p) {
- O << (Comma ? ", %" : "%") << RI.get (*p).Name;
- emitted = true;
- ++p;
- }
- while (*p) {
- // Bug Workaround: See note in Printer::doInitialization about %.
- O << ", %" << RI.get(*p).Name;
- ++p;
- }
- return emitted;
+bool X86AsmPrinter::printAsmMRegister(const MachineOperand &MO, char Mode,
+ raw_ostream &O) {
+ unsigned Reg = MO.getReg();
+ switch (Mode) {
+ default: return true; // Unknown mode.
+ case 'b': // Print QImode register
+ Reg = getX86SubSuperRegister(Reg, MVT::i8);
+ break;
+ case 'h': // Print QImode high register
+ Reg = getX86SubSuperRegister(Reg, MVT::i8, true);
+ break;
+ case 'w': // Print HImode register
+ Reg = getX86SubSuperRegister(Reg, MVT::i16);
+ break;
+ case 'k': // Print SImode register
+ Reg = getX86SubSuperRegister(Reg, MVT::i32);
+ break;
+ case 'q': // Print DImode register
+ Reg = getX86SubSuperRegister(Reg, MVT::i64);
+ break;
}
+
+ O << '%' << X86ATTInstPrinter::getRegisterName(Reg);
return false;
}
-/// printImplDefsAfter - Emit the implicit-definition registers for the
-/// instruction described by DESC, if its PrintImplDefsAfter flag is set.
+/// PrintAsmOperand - Print out an operand for an inline asm expression.
///
-/// Inputs:
-/// Comma - List of registers will need a leading comma.
-/// Desc - Description of the Instruction
-///
-/// Return value:
-/// true - Emitted one or more registers.
-/// false - Emitted no registers.
-///
-bool Printer::printImplDefsAfter(const TargetInstrDescriptor &Desc,
- const bool Comma = true) {
- const MRegisterInfo &RI = *TM.getRegisterInfo();
- if (Desc.TSFlags & X86II::PrintImplDefsAfter) {
- bool emitted = false;
- const unsigned *p = Desc.ImplicitDefs;
- if (*p) {
- O << (Comma ? ", %" : "%") << RI.get (*p).Name;
- emitted = true;
- ++p;
+bool X86AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
+ unsigned AsmVariant,
+ const char *ExtraCode, raw_ostream &O) {
+ // Does this asm operand have a single letter operand modifier?
+ if (ExtraCode && ExtraCode[0]) {
+ if (ExtraCode[1] != 0) return true; // Unknown modifier.
+
+ const MachineOperand &MO = MI->getOperand(OpNo);
+
+ switch (ExtraCode[0]) {
+ default: return true; // Unknown modifier.
+ case 'a': // This is an address. Currently only 'i' and 'r' are expected.
+ if (MO.isImm()) {
+ O << MO.getImm();
+ return false;
+ }
+ if (MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isSymbol()) {
+ printSymbolOperand(MO, O);
+ if (Subtarget->isPICStyleRIPRel())
+ O << "(%rip)";
+ return false;
+ }
+ if (MO.isReg()) {
+ O << '(';
+ printOperand(MI, OpNo, O);
+ O << ')';
+ return false;
+ }
+ return true;
+
+ case 'c': // Don't print "$" before a global var name or constant.
+ if (MO.isImm())
+ O << MO.getImm();
+ else if (MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isSymbol())
+ printSymbolOperand(MO, O);
+ else
+ printOperand(MI, OpNo, O);
+ return false;
+
+ case 'A': // Print '*' before a register (it must be a register)
+ if (MO.isReg()) {
+ O << '*';
+ printOperand(MI, OpNo, O);
+ return false;
+ }
+ return true;
+
+ case 'b': // Print QImode register
+ case 'h': // Print QImode high register
+ case 'w': // Print HImode register
+ case 'k': // Print SImode register
+ case 'q': // Print DImode register
+ if (MO.isReg())
+ return printAsmMRegister(MO, ExtraCode[0], O);
+ printOperand(MI, OpNo, O);
+ return false;
+
+ case 'P': // This is the operand of a call, treat specially.
+ print_pcrel_imm(MI, OpNo, O);
+ return false;
+
+ case 'n': // Negate the immediate or print a '-' before the operand.
+ // Note: this is a temporary solution. It should be handled target
+ // independently as part of the 'MC' work.
+ if (MO.isImm()) {
+ O << -MO.getImm();
+ return false;
+ }
+ O << '-';
}
- while (*p) {
- // Bug Workaround: See note in Printer::doInitialization about %.
- O << ", %" << RI.get(*p).Name;
- ++p;
+ }
+
+ printOperand(MI, OpNo, O);
+ return false;
+}
+
+bool X86AsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
+ unsigned OpNo, unsigned AsmVariant,
+ const char *ExtraCode,
+ raw_ostream &O) {
+ if (ExtraCode && ExtraCode[0]) {
+ if (ExtraCode[1] != 0) return true; // Unknown modifier.
+
+ switch (ExtraCode[0]) {
+ default: return true; // Unknown modifier.
+ case 'b': // Print QImode register
+ case 'h': // Print QImode high register
+ case 'w': // Print HImode register
+ case 'k': // Print SImode register
+ case 'q': // Print SImode register
+ // These only apply to registers, ignore on mem.
+ break;
+ case 'P': // Don't print @PLT, but do print as memory.
+ printMemReference(MI, OpNo, O, "no-rip");
+ return false;
}
- return emitted;
}
+ printMemReference(MI, OpNo, O);
return false;
}
-/// printMachineInstruction -- Print out a single X86 LLVM instruction
-/// MI in Intel syntax to the current output stream.
-///
-void Printer::printMachineInstruction(const MachineInstr *MI) {
- unsigned Opcode = MI->getOpcode();
- const TargetInstrInfo &TII = *TM.getInstrInfo();
- const TargetInstrDescriptor &Desc = TII.get(Opcode);
-
- ++EmittedInsts;
- switch (Desc.TSFlags & X86II::FormMask) {
- case X86II::Pseudo:
- // Print pseudo-instructions as comments; either they should have been
- // turned into real instructions by now, or they don't need to be
- // seen by the assembler (e.g., IMPLICIT_USEs.)
- O << "# ";
- if (Opcode == X86::PHI) {
- printOp(MI->getOperand(0));
- O << " = phi ";
- for (unsigned i = 1, e = MI->getNumOperands(); i != e; i+=2) {
- if (i != 1) O << ", ";
- O << "[";
- printOp(MI->getOperand(i));
- O << ", ";
- printOp(MI->getOperand(i+1));
- O << "]";
- }
- } else {
- unsigned i = 0;
- if (MI->getNumOperands() && MI->getOperand(0).isDef()) {
- printOp(MI->getOperand(0));
- O << " = ";
- ++i;
- }
- O << TII.getName(MI->getOpcode());
+void X86AsmPrinter::EmitStartOfAsmFile(Module &M) {
+ if (Subtarget->isTargetDarwin())
+ OutStreamer.SwitchSection(getObjFileLowering().getTextSection());
+}
- for (unsigned e = MI->getNumOperands(); i != e; ++i) {
- O << " ";
- if (MI->getOperand(i).isDef()) O << "*";
- printOp(MI->getOperand(i));
- if (MI->getOperand(i).isDef()) O << "*";
+
+void X86AsmPrinter::EmitEndOfAsmFile(Module &M) {
+ if (Subtarget->isTargetDarwin()) {
+ // All darwin targets use mach-o.
+ MachineModuleInfoMachO &MMIMacho =
+ MMI->getObjFileInfo<MachineModuleInfoMachO>();
+
+ // Output stubs for dynamically-linked functions.
+ MachineModuleInfoMachO::SymbolListTy Stubs;
+
+ Stubs = MMIMacho.GetFnStubList();
+ if (!Stubs.empty()) {
+ const MCSection *TheSection =
+ OutContext.getMachOSection("__IMPORT", "__jump_table",
+ MCSectionMachO::S_SYMBOL_STUBS |
+ MCSectionMachO::S_ATTR_SELF_MODIFYING_CODE |
+ MCSectionMachO::S_ATTR_PURE_INSTRUCTIONS,
+ 5, SectionKind::getMetadata());
+ OutStreamer.SwitchSection(TheSection);
+
+ for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
+ // L_foo$stub:
+ OutStreamer.EmitLabel(Stubs[i].first);
+ // .indirect_symbol _foo
+ OutStreamer.EmitSymbolAttribute(Stubs[i].second.getPointer(),
+ MCSA_IndirectSymbol);
+ // hlt; hlt; hlt; hlt; hlt hlt = 0xf4 = -12.
+ const char HltInsts[] = { -12, -12, -12, -12, -12 };
+ OutStreamer.EmitBytes(StringRef(HltInsts, 5), 0/*addrspace*/);
}
- }
- O << "\n";
- return;
- case X86II::RawFrm:
- {
- // The accepted forms of Raw instructions are:
- // 1. nop - No operand required
- // 2. jmp foo - MachineBasicBlock operand
- // 3. call bar - GlobalAddress Operand or External Symbol Operand
- // 4. in AL, imm - Immediate operand
- //
- assert(MI->getNumOperands() == 0 ||
- (MI->getNumOperands() == 1 &&
- (MI->getOperand(0).isMachineBasicBlock() ||
- MI->getOperand(0).isGlobalAddress() ||
- MI->getOperand(0).isExternalSymbol() ||
- MI->getOperand(0).isImmediate())) &&
- "Illegal raw instruction!");
- O << TII.getName(MI->getOpcode()) << " ";
-
- bool LeadingComma = printImplDefsBefore(Desc);
-
- if (MI->getNumOperands() == 1) {
- if (LeadingComma) O << ", ";
- printOp(MI->getOperand(0), true); // Don't print "OFFSET"...
- LeadingComma = true;
+ Stubs.clear();
+ OutStreamer.AddBlankLine();
}
- LeadingComma = printImplDefsAfter(Desc, LeadingComma) || LeadingComma;
- printImplUsesAfter(Desc, LeadingComma);
- O << "\n";
- return;
- }
- case X86II::AddRegFrm: {
- // There are currently two forms of acceptable AddRegFrm instructions.
- // Either the instruction JUST takes a single register (like inc, dec, etc),
- // or it takes a register and an immediate of the same size as the register
- // (move immediate f.e.). Note that this immediate value might be stored as
- // an LLVM value, to represent, for example, loading the address of a global
- // into a register. The initial register might be duplicated if this is a
- // M_2_ADDR_REG instruction
- //
- assert(MI->getOperand(0).isRegister() &&
- (MI->getNumOperands() == 1 ||
- (MI->getNumOperands() == 2 &&
- (MI->getOperand(1).getVRegValueOrNull() ||
- MI->getOperand(1).isImmediate() ||
- MI->getOperand(1).isRegister() ||
- MI->getOperand(1).isGlobalAddress() ||
- MI->getOperand(1).isExternalSymbol()))) &&
- "Illegal form for AddRegFrm instruction!");
-
- unsigned Reg = MI->getOperand(0).getReg();
-
- O << TII.getName(MI->getOpcode()) << " ";
-
- printImplUsesBefore(Desc); // fcmov*
-
- printOp(MI->getOperand(0));
- if (MI->getNumOperands() == 2 &&
- (!MI->getOperand(1).isRegister() ||
- MI->getOperand(1).getVRegValueOrNull() ||
- MI->getOperand(1).isGlobalAddress() ||
- MI->getOperand(1).isExternalSymbol())) {
- O << ", ";
- printOp(MI->getOperand(1));
+ // Output stubs for external and common global variables.
+ Stubs = MMIMacho.GetGVStubList();
+ if (!Stubs.empty()) {
+ const MCSection *TheSection =
+ OutContext.getMachOSection("__IMPORT", "__pointers",
+ MCSectionMachO::S_NON_LAZY_SYMBOL_POINTERS,
+ SectionKind::getMetadata());
+ OutStreamer.SwitchSection(TheSection);
+
+ for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
+ // L_foo$non_lazy_ptr:
+ OutStreamer.EmitLabel(Stubs[i].first);
+ // .indirect_symbol _foo
+ MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second;
+ OutStreamer.EmitSymbolAttribute(MCSym.getPointer(),
+ MCSA_IndirectSymbol);
+ // .long 0
+ if (MCSym.getInt())
+ // External to current translation unit.
+ OutStreamer.EmitIntValue(0, 4/*size*/, 0/*addrspace*/);
+ else
+ // Internal to current translation unit.
+ //
+ // When we place the LSDA into the TEXT section, the type info
+ // pointers need to be indirect and pc-rel. We accomplish this by
+ // using NLPs. However, sometimes the types are local to the file. So
+ // we need to fill in the value for the NLP in those cases.
+ OutStreamer.EmitValue(MCSymbolRefExpr::Create(MCSym.getPointer(),
+ OutContext),
+ 4/*size*/, 0/*addrspace*/);
+ }
+ Stubs.clear();
+ OutStreamer.AddBlankLine();
}
- printImplUsesAfter(Desc);
- O << "\n";
- return;
- }
- case X86II::MRMDestReg: {
- // There are three forms of MRMDestReg instructions, those with 2
- // or 3 operands:
- //
- // 2 Operands: this is for things like mov that do not read a
- // second input.
- //
- // 2 Operands: two address instructions which def&use the first
- // argument and use the second as input.
- //
- // 3 Operands: in this form, two address instructions are the same
- // as in 2 but have a constant argument as well.
- //
- bool isTwoAddr = TII.isTwoAddrInstr(Opcode);
- assert(MI->getOperand(0).isRegister() &&
- (MI->getNumOperands() == 2 ||
- (MI->getNumOperands() == 3 && MI->getOperand(2).isImmediate()))
- && "Bad format for MRMDestReg!");
-
- O << TII.getName(MI->getOpcode()) << " ";
- printOp(MI->getOperand(0));
- O << ", ";
- printOp(MI->getOperand(1));
- if (MI->getNumOperands() == 3) {
- O << ", ";
- printOp(MI->getOperand(2));
+
+ Stubs = MMIMacho.GetHiddenGVStubList();
+ if (!Stubs.empty()) {
+ OutStreamer.SwitchSection(getObjFileLowering().getDataSection());
+ EmitAlignment(2);
+
+ for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
+ // L_foo$non_lazy_ptr:
+ OutStreamer.EmitLabel(Stubs[i].first);
+ // .long _foo
+ OutStreamer.EmitValue(MCSymbolRefExpr::
+ Create(Stubs[i].second.getPointer(),
+ OutContext),
+ 4/*size*/, 0/*addrspace*/);
+ }
+ Stubs.clear();
+ OutStreamer.AddBlankLine();
}
- printImplUsesAfter(Desc);
- O << "\n";
- return;
+
+ // Funny Darwin hack: This flag tells the linker that no global symbols
+ // contain code that falls through to other global symbols (e.g. the obvious
+ // implementation of multiple entry points). If this doesn't occur, the
+ // linker can safely perform dead code stripping. Since LLVM never
+ // generates code that does this, it is always safe to set.
+ OutStreamer.EmitAssemblerFlag(MCAF_SubsectionsViaSymbols);
}
- case X86II::MRMDestMem: {
- // These instructions are the same as MRMDestReg, but instead of having a
- // register reference for the mod/rm field, it's a memory reference.
- //
- assert(isMem(MI, 0) &&
- (MI->getNumOperands() == 4+1 ||
- (MI->getNumOperands() == 4+2 && MI->getOperand(5).isImmediate()))
- && "Bad format for MRMDestMem!");
-
- O << TII.getName(MI->getOpcode()) << " " << sizePtr(Desc) << " ";
- printMemReference(MI, 0);
- O << ", ";
- printOp(MI->getOperand(4));
- if (MI->getNumOperands() == 4+2) {
- O << ", ";
- printOp(MI->getOperand(5));
- }
- printImplUsesAfter(Desc);
- O << "\n";
- return;
+ if (Subtarget->isTargetWindows() && !Subtarget->isTargetCygMing() &&
+ MMI->callsExternalVAFunctionWithFloatingPointArguments()) {
+ StringRef SymbolName = Subtarget->is64Bit() ? "_fltused" : "__fltused";
+ MCSymbol *S = MMI->getContext().GetOrCreateSymbol(SymbolName);
+ OutStreamer.EmitSymbolAttribute(S, MCSA_Global);
}
- case X86II::MRMSrcReg: {
- // There are three forms that are acceptable for MRMSrcReg
- // instructions, those with 2 or 3 operands:
- //
- // 2 Operands: this is for things like mov that do not read a
- // second input.
- //
- // 2 Operands: in this form, the last register is the ModR/M
- // input. The first operand is a def&use. This is for things
- // like: add r32, r/m32
- //
- // 3 Operands: in this form, we can have 'INST R1, R2, imm', which is used
- // for instructions like the IMULrri instructions.
- //
- //
- assert(MI->getOperand(0).isRegister() &&
- MI->getOperand(1).isRegister() &&
- (MI->getNumOperands() == 2 ||
- (MI->getNumOperands() == 3 &&
- (MI->getOperand(2).isImmediate())))
- && "Bad format for MRMSrcReg!");
-
- O << TII.getName(MI->getOpcode()) << " ";
- printOp(MI->getOperand(0));
- O << ", ";
- printOp(MI->getOperand(1));
- if (MI->getNumOperands() == 3) {
- O << ", ";
- printOp(MI->getOperand(2));
+ if (Subtarget->isTargetCOFF()) {
+ X86COFFMachineModuleInfo &COFFMMI =
+ MMI->getObjFileInfo<X86COFFMachineModuleInfo>();
+
+ // Emit type information for external functions
+ typedef X86COFFMachineModuleInfo::externals_iterator externals_iterator;
+ for (externals_iterator I = COFFMMI.externals_begin(),
+ E = COFFMMI.externals_end();
+ I != E; ++I) {
+ OutStreamer.BeginCOFFSymbolDef(CurrentFnSym);
+ OutStreamer.EmitCOFFSymbolStorageClass(COFF::IMAGE_SYM_CLASS_EXTERNAL);
+ OutStreamer.EmitCOFFSymbolType(COFF::IMAGE_SYM_DTYPE_FUNCTION
+ << COFF::SCT_COMPLEX_TYPE_SHIFT);
+ OutStreamer.EndCOFFSymbolDef();
}
- O << "\n";
- return;
- }
- case X86II::MRMSrcMem: {
- // These instructions are the same as MRMSrcReg, but instead of having a
- // register reference for the mod/rm field, it's a memory reference.
- //
- assert(MI->getOperand(0).isRegister() &&
- (MI->getNumOperands() == 1+4 && isMem(MI, 1)) ||
-(MI->getNumOperands() == 2+4 && MI->getOperand(5).isImmediate() && isMem(MI, 1))
- && "Bad format for MRMSrcMem!");
- O << TII.getName(MI->getOpcode()) << " ";
- printOp(MI->getOperand(0));
- O << ", " << sizePtr(Desc) << " ";
- printMemReference(MI, 1);
- if (MI->getNumOperands() == 2+4) {
- O << ", ";
- printOp(MI->getOperand(5));
+ // Necessary for dllexport support
+ std::vector<const MCSymbol*> DLLExportedFns, DLLExportedGlobals;
+
+ const TargetLoweringObjectFileCOFF &TLOFCOFF =
+ static_cast<const TargetLoweringObjectFileCOFF&>(getObjFileLowering());
+
+ for (Module::const_iterator I = M.begin(), E = M.end(); I != E; ++I)
+ if (I->hasDLLExportLinkage())
+ DLLExportedFns.push_back(Mang->getSymbol(I));
+
+ for (Module::const_global_iterator I = M.global_begin(),
+ E = M.global_end(); I != E; ++I)
+ if (I->hasDLLExportLinkage())
+ DLLExportedGlobals.push_back(Mang->getSymbol(I));
+
+ // Output linker support code for dllexported globals on windows.
+ if (!DLLExportedGlobals.empty() || !DLLExportedFns.empty()) {
+ OutStreamer.SwitchSection(TLOFCOFF.getDrectveSection());
+ SmallString<128> name;
+ for (unsigned i = 0, e = DLLExportedGlobals.size(); i != e; ++i) {
+ if (Subtarget->isTargetWindows())
+ name = " /EXPORT:";
+ else
+ name = " -export:";
+ name += DLLExportedGlobals[i]->getName();
+ if (Subtarget->isTargetWindows())
+ name += ",DATA";
+ else
+ name += ",data";
+ OutStreamer.EmitBytes(name, 0);
+ }
+
+ for (unsigned i = 0, e = DLLExportedFns.size(); i != e; ++i) {
+ if (Subtarget->isTargetWindows())
+ name = " /EXPORT:";
+ else
+ name = " -export:";
+ name += DLLExportedFns[i]->getName();
+ OutStreamer.EmitBytes(name, 0);
+ }
}
- O << "\n";
- return;
}
- case X86II::MRM0r: case X86II::MRM1r:
- case X86II::MRM2r: case X86II::MRM3r:
- case X86II::MRM4r: case X86II::MRM5r:
- case X86II::MRM6r: case X86II::MRM7r: {
- // In this form, the following are valid formats:
- // 1. sete r
- // 2. cmp reg, immediate
- // 2. shl rdest, rinput <implicit CL or 1>
- // 3. sbb rdest, rinput, immediate [rdest = rinput]
- //
- assert(MI->getNumOperands() > 0 && MI->getNumOperands() < 4 &&
- MI->getOperand(0).isRegister() && "Bad MRMSxR format!");
- assert((MI->getNumOperands() != 2 ||
- MI->getOperand(1).isRegister() || MI->getOperand(1).isImmediate())&&
- "Bad MRMSxR format!");
- assert((MI->getNumOperands() < 3 ||
- (MI->getOperand(1).isRegister() && MI->getOperand(2).isImmediate())) &&
- "Bad MRMSxR format!");
-
- if (MI->getNumOperands() > 1 && MI->getOperand(1).isRegister() &&
- MI->getOperand(0).getReg() != MI->getOperand(1).getReg())
- O << "**";
-
- O << TII.getName(MI->getOpcode()) << " ";
- printOp(MI->getOperand(0));
- if (MI->getOperand(MI->getNumOperands()-1).isImmediate()) {
- O << ", ";
- printOp(MI->getOperand(MI->getNumOperands()-1));
- }
- printImplUsesAfter(Desc);
- O << "\n";
+ if (Subtarget->isTargetELF()) {
+ const TargetLoweringObjectFileELF &TLOFELF =
+ static_cast<const TargetLoweringObjectFileELF &>(getObjFileLowering());
- return;
- }
+ MachineModuleInfoELF &MMIELF = MMI->getObjFileInfo<MachineModuleInfoELF>();
- case X86II::MRM0m: case X86II::MRM1m:
- case X86II::MRM2m: case X86II::MRM3m:
- case X86II::MRM4m: case X86II::MRM5m:
- case X86II::MRM6m: case X86II::MRM7m: {
- // In this form, the following are valid formats:
- // 1. sete [m]
- // 2. cmp [m], immediate
- // 2. shl [m], rinput <implicit CL or 1>
- // 3. sbb [m], immediate
- //
- assert(MI->getNumOperands() >= 4 && MI->getNumOperands() <= 5 &&
- isMem(MI, 0) && "Bad MRMSxM format!");
- assert((MI->getNumOperands() != 5 ||
- (MI->getOperand(4).isImmediate() ||
- MI->getOperand(4).isGlobalAddress())) &&
- "Bad MRMSxM format!");
-
- const MachineOperand &Op3 = MI->getOperand(3);
-
- // gas bugs:
- //
- // The 80-bit FP store-pop instruction "fstp XWORD PTR [...]"
- // is misassembled by gas in intel_syntax mode as its 32-bit
- // equivalent "fstp DWORD PTR [...]". Workaround: Output the raw
- // opcode bytes instead of the instruction.
- //
- // The 80-bit FP load instruction "fld XWORD PTR [...]" is
- // misassembled by gas in intel_syntax mode as its 32-bit
- // equivalent "fld DWORD PTR [...]". Workaround: Output the raw
- // opcode bytes instead of the instruction.
- //
- // gas intel_syntax mode treats "fild QWORD PTR [...]" as an
- // invalid opcode, saying "64 bit operations are only supported in
- // 64 bit modes." libopcodes disassembles it as "fild DWORD PTR
- // [...]", which is wrong. Workaround: Output the raw opcode bytes
- // instead of the instruction.
- //
- // gas intel_syntax mode treats "fistp QWORD PTR [...]" as an
- // invalid opcode, saying "64 bit operations are only supported in
- // 64 bit modes." libopcodes disassembles it as "fistpll DWORD PTR
- // [...]", which is wrong. Workaround: Output the raw opcode bytes
- // instead of the instruction.
- if (MI->getOpcode() == X86::FSTP80m ||
- MI->getOpcode() == X86::FLD80m ||
- MI->getOpcode() == X86::FILD64m ||
- MI->getOpcode() == X86::FISTP64m) {
- GasBugWorkaroundEmitter gwe(O);
- X86::emitInstruction(gwe, (X86InstrInfo&)*TM.getInstrInfo(), *MI);
- }
+ // Output stubs for external and common global variables.
+ MachineModuleInfoELF::SymbolListTy Stubs = MMIELF.GetGVStubList();
+ if (!Stubs.empty()) {
+ OutStreamer.SwitchSection(TLOFELF.getDataRelSection());
+ const TargetData *TD = TM.getTargetData();
- O << TII.getName(MI->getOpcode()) << " ";
- O << sizePtr(Desc) << " ";
- printMemReference(MI, 0);
- if (MI->getNumOperands() == 5) {
- O << ", ";
- printOp(MI->getOperand(4));
+ for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
+ OutStreamer.EmitLabel(Stubs[i].first);
+ OutStreamer.EmitSymbolValue(Stubs[i].second.getPointer(),
+ TD->getPointerSize(), 0);
+ }
+ Stubs.clear();
}
- printImplUsesAfter(Desc);
- O << "\n";
- return;
}
- default:
- O << "\tUNKNOWN FORM:\t\t-"; MI->print(O, &TM); break;
+}
+
+MachineLocation
+X86AsmPrinter::getDebugValueLocation(const MachineInstr *MI) const {
+ MachineLocation Location;
+ assert (MI->getNumOperands() == 7 && "Invalid no. of machine operands!");
+ // Frame address. Currently handles register +- offset only.
+
+ if (MI->getOperand(0).isReg() && MI->getOperand(3).isImm())
+ Location.set(MI->getOperand(0).getReg(), MI->getOperand(3).getImm());
+ else {
+ DEBUG(dbgs() << "DBG_VALUE instruction ignored! " << *MI << "\n");
}
+ return Location;
}
-bool Printer::doInitialization(Module &M) {
- // Tell gas we are outputting Intel syntax (not AT&T syntax) assembly.
- //
- // Bug: gas in `intel_syntax noprefix' mode interprets the symbol `Sp' in an
- // instruction as a reference to the register named sp, and if you try to
- // reference a symbol `Sp' (e.g. `mov ECX, OFFSET Sp') then it gets lowercased
- // before being looked up in the symbol table. This creates spurious
- // `undefined symbol' errors when linking. Workaround: Do not use `noprefix'
- // mode, and decorate all register names with percent signs.
- O << "\t.intel_syntax\n";
- Mang = new Mangler(M, EmitCygwin);
- return false; // success
+void X86AsmPrinter::PrintDebugValueComment(const MachineInstr *MI,
+ raw_ostream &O) {
+ // Only the target-dependent form of DBG_VALUE should get here.
+ // Referencing the offset and metadata as NOps-2 and NOps-1 is
+ // probably portable to other targets; frame pointer location is not.
+ unsigned NOps = MI->getNumOperands();
+ assert(NOps==7);
+ O << '\t' << MAI->getCommentString() << "DEBUG_VALUE: ";
+ // cast away const; DIetc do not take const operands for some reason.
+ DIVariable V(const_cast<MDNode *>(MI->getOperand(NOps-1).getMetadata()));
+ if (V.getContext().isSubprogram())
+ O << DISubprogram(V.getContext()).getDisplayName() << ":";
+ O << V.getName();
+ O << " <- ";
+ // Frame address. Currently handles register +- offset only.
+ O << '[';
+ if (MI->getOperand(0).isReg() && MI->getOperand(0).getReg())
+ printOperand(MI, 0, O);
+ else
+ O << "undef";
+ O << '+'; printOperand(MI, 3, O);
+ O << ']';
+ O << "+";
+ printOperand(MI, NOps-2, O);
}
-// SwitchSection - Switch to the specified section of the executable if we are
-// not already in it!
-//
-static void SwitchSection(std::ostream &OS, std::string &CurSection,
- const char *NewSection) {
- if (CurSection != NewSection) {
- CurSection = NewSection;
- if (!CurSection.empty())
- OS << "\t" << NewSection << "\n";
- }
+
+
+//===----------------------------------------------------------------------===//
+// Target Registry Stuff
+//===----------------------------------------------------------------------===//
+
+static MCInstPrinter *createX86MCInstPrinter(const Target &T,
+ unsigned SyntaxVariant,
+ const MCAsmInfo &MAI) {
+ if (SyntaxVariant == 0)
+ return new X86ATTInstPrinter(MAI);
+ if (SyntaxVariant == 1)
+ return new X86IntelInstPrinter(MAI);
+ return 0;
}
-bool Printer::doFinalization(Module &M) {
- const TargetData &TD = TM.getTargetData();
- std::string CurSection;
-
- // Print out module-level global variables here.
- for (Module::const_giterator I = M.gbegin(), E = M.gend(); I != E; ++I)
- if (I->hasInitializer()) { // External global require no code
- O << "\n\n";
- std::string name = Mang->getValueName(I);
- Constant *C = I->getInitializer();
- unsigned Size = TD.getTypeSize(C->getType());
- unsigned Align = TD.getTypeAlignment(C->getType());
-
- if (C->isNullValue() &&
- (I->hasLinkOnceLinkage() || I->hasInternalLinkage() ||
- I->hasWeakLinkage() /* FIXME: Verify correct */)) {
- SwitchSection(O, CurSection, ".data");
- if (I->hasInternalLinkage())
- O << "\t.local " << name << "\n";
-
- O << "\t.comm " << name << "," << TD.getTypeSize(C->getType())
- << "," << (unsigned)TD.getTypeAlignment(C->getType());
- O << "\t\t# ";
- WriteAsOperand(O, I, true, true, &M);
- O << "\n";
- } else {
- switch (I->getLinkage()) {
- case GlobalValue::LinkOnceLinkage:
- case GlobalValue::WeakLinkage: // FIXME: Verify correct for weak.
- // Nonnull linkonce -> weak
- O << "\t.weak " << name << "\n";
- SwitchSection(O, CurSection, "");
- O << "\t.section\t.llvm.linkonce.d." << name << ",\"aw\",@progbits\n";
- break;
-
- case GlobalValue::AppendingLinkage:
- // FIXME: appending linkage variables should go into a section of
- // their name or something. For now, just emit them as external.
- case GlobalValue::ExternalLinkage:
- // If external or appending, declare as a global symbol
- O << "\t.globl " << name << "\n";
- // FALL THROUGH
- case GlobalValue::InternalLinkage:
- if (C->isNullValue())
- SwitchSection(O, CurSection, ".bss");
- else
- SwitchSection(O, CurSection, ".data");
- break;
- }
-
- O << "\t.align " << Align << "\n";
- O << "\t.type " << name << ",@object\n";
- O << "\t.size " << name << "," << Size << "\n";
- O << name << ":\t\t\t\t# ";
- WriteAsOperand(O, I, true, true, &M);
- O << " = ";
- WriteAsOperand(O, C, false, false, &M);
- O << "\n";
- emitGlobalConstant(C);
- }
- }
+// Force static initialization.
+extern "C" void LLVMInitializeX86AsmPrinter() {
+ RegisterAsmPrinter<X86AsmPrinter> X(TheX86_32Target);
+ RegisterAsmPrinter<X86AsmPrinter> Y(TheX86_64Target);
- delete Mang;
- return false; // success
+ TargetRegistry::RegisterMCInstPrinter(TheX86_32Target,createX86MCInstPrinter);
+ TargetRegistry::RegisterMCInstPrinter(TheX86_64Target,createX86MCInstPrinter);
}
projects / oota-llvm.git / blobdiff