#include "llvm/CodeGen/Passes.h"
#include "llvm/Function.h"
#include "llvm/ADT/Statistic.h"
+#include "llvm/Target/TargetOptions.h"
#include <iostream>
using namespace llvm;
class Emitter : public MachineFunctionPass {
const X86InstrInfo *II;
MachineCodeEmitter &MCE;
- std::map<const MachineBasicBlock*, unsigned> BasicBlockAddrs;
- std::vector<std::pair<const MachineBasicBlock *, unsigned> > BBRefs;
+ std::map<MachineBasicBlock*, uint64_t> BasicBlockAddrs;
+ std::vector<std::pair<MachineBasicBlock *, unsigned> > BBRefs;
public:
explicit Emitter(MachineCodeEmitter &mce) : II(0), MCE(mce) {}
Emitter(MachineCodeEmitter &mce, const X86InstrInfo& ii)
void emitInstruction(const MachineInstr &MI);
private:
- void emitBasicBlock(const MachineBasicBlock &MBB);
-
- void emitPCRelativeBlockAddress(const MachineBasicBlock *BB);
+ void emitBasicBlock(MachineBasicBlock &MBB);
+ void emitPCRelativeBlockAddress(MachineBasicBlock *MBB);
void emitPCRelativeValue(unsigned Address);
void emitGlobalAddressForCall(GlobalValue *GV, bool isTailCall);
void emitGlobalAddressForPtr(GlobalValue *GV, int Disp = 0);
}
bool Emitter::runOnMachineFunction(MachineFunction &MF) {
+ assert((MF.getTarget().getRelocationModel() != Reloc::Default ||
+ MF.getTarget().getRelocationModel() != Reloc::Static) &&
+ "JIT relocation model must be set to static or default!");
II = ((X86TargetMachine&)MF.getTarget()).getInstrInfo();
MCE.startFunction(MF);
MCE.emitConstantPool(MF.getConstantPool());
+ MCE.initJumpTableInfo(MF.getJumpTableInfo());
for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
emitBasicBlock(*I);
+ MCE.emitJumpTableInfo(MF.getJumpTableInfo(), BasicBlockAddrs);
MCE.finishFunction(MF);
// Resolve all forward branches now...
return false;
}
-void Emitter::emitBasicBlock(const MachineBasicBlock &MBB) {
+void Emitter::emitBasicBlock(MachineBasicBlock &MBB) {
if (uint64_t Addr = MCE.getCurrentPCValue())
BasicBlockAddrs[&MBB] = Addr;
/// (because this is a forward branch), it keeps track of the information
/// necessary to resolve this address later (and emits a dummy value).
///
-void Emitter::emitPCRelativeBlockAddress(const MachineBasicBlock *MBB) {
+void Emitter::emitPCRelativeBlockAddress(MachineBasicBlock *MBB) {
// If this is a backwards branch, we already know the address of the target,
// so just emit the value.
- std::map<const MachineBasicBlock*, unsigned>::iterator I =
- BasicBlockAddrs.find(MBB);
+ std::map<MachineBasicBlock*,uint64_t>::iterator I = BasicBlockAddrs.find(MBB);
if (I != BasicBlockAddrs.end()) {
emitPCRelativeValue(I->second);
} else {
case X86::ST0: case X86::ST1: case X86::ST2: case X86::ST3:
case X86::ST4: case X86::ST5: case X86::ST6: case X86::ST7:
return RegNo-X86::ST0;
+
+ case X86::XMM0: case X86::XMM1: case X86::XMM2: case X86::XMM3:
+ case X86::XMM4: case X86::XMM5: case X86::XMM6: case X86::XMM7:
+ return RegNo-X86::XMM0;
+
default:
assert(MRegisterInfo::isVirtualRegister(RegNo) &&
"Unknown physical register!");
if (Op3.isGlobalAddress()) {
GV = Op3.getGlobal();
DispVal = Op3.getOffset();
+ } else if (Op3.isConstantPoolIndex()) {
+ DispVal += MCE.getConstantPoolEntryAddress(Op3.getConstantPoolIndex());
+ DispVal += Op3.getOffset();
+ } else if (Op3.isJumpTableIndex()) {
+ DispVal += MCE.getJumpTableEntryAddress(Op3.getJumpTableIndex());
} else {
DispVal = Op3.getImmedValue();
}
const MachineOperand &Scale = MI.getOperand(Op+1);
const MachineOperand &IndexReg = MI.getOperand(Op+2);
- unsigned BaseReg = 0;
-
- if (Base.isConstantPoolIndex()) {
- // Emit a direct address reference [disp32] where the displacement of the
- // constant pool entry is controlled by the MCE.
- assert(!GV && "Constant Pool reference cannot be relative to global!");
- DispVal += MCE.getConstantPoolEntryAddress(Base.getConstantPoolIndex());
- } else {
- BaseReg = Base.getReg();
- }
+ unsigned BaseReg = Base.getReg();
// Is a SIB byte needed?
if (IndexReg.getReg() == 0 && BaseReg != X86::ESP) {
// Emit the operand size opcode prefix as needed.
if (Desc.TSFlags & X86II::OpSize) MCE.emitByte(0x66);
- // Emit the double precision sse fp opcode prefix as needed.
- if ((Desc.TSFlags & X86II::Op0Mask) == X86II::XD) {
- MCE.emitByte(0xF2); MCE.emitByte(0x0F);
- }
-
- // Emit the double precision sse fp opcode prefix as needed.
- if ((Desc.TSFlags & X86II::Op0Mask) == X86II::XS) {
- MCE.emitByte(0xF3); MCE.emitByte(0x0F);
- }
-
switch (Desc.TSFlags & X86II::Op0Mask) {
case X86II::TB:
MCE.emitByte(0x0F); // Two-byte opcode prefix
break;
case X86II::REP: break; // already handled.
+ case X86II::XS: // F3 0F
+ MCE.emitByte(0xF3);
+ MCE.emitByte(0x0F);
+ break;
+ case X86II::XD: // F2 0F
+ MCE.emitByte(0xF2);
+ MCE.emitByte(0x0F);
+ break;
case X86II::D8: case X86II::D9: case X86II::DA: case X86II::DB:
case X86II::DC: case X86II::DD: case X86II::DE: case X86II::DF:
MCE.emitByte(0xD8+
switch (Desc.TSFlags & X86II::FormMask) {
default: assert(0 && "Unknown FormMask value in X86 MachineCodeEmitter!");
case X86II::Pseudo:
- if (Opcode != X86::IMPLICIT_USE &&
- Opcode != X86::IMPLICIT_DEF &&
- Opcode != X86::FP_REG_KILL)
- std::cerr << "X86 Machine Code Emitter: No 'form', not emitting: " << MI;
+#ifndef NDEBUG
+ switch (Opcode) {
+ default:
+ assert(0 && "psuedo instructions should be removed before code emission");
+ case X86::IMPLICIT_USE:
+ case X86::IMPLICIT_DEF:
+ case X86::IMPLICIT_DEF_R8:
+ case X86::IMPLICIT_DEF_R16:
+ case X86::IMPLICIT_DEF_R32:
+ case X86::IMPLICIT_DEF_FR32:
+ case X86::IMPLICIT_DEF_FR64:
+ case X86::IMPLICIT_DEF_VR64:
+ case X86::IMPLICIT_DEF_VR128:
+ case X86::FP_REG_KILL:
+ break;
+ }
+#endif
break;
case X86II::RawFrm:
assert(sizeOfImm(Desc) == 4 &&
"Don't know how to emit non-pointer values!");
emitExternalSymbolAddress(MO1.getSymbolName(), false, false);
+ } else if (MO1.isJumpTableIndex()) {
+ assert(sizeOfImm(Desc) == 4 &&
+ "Don't know how to emit non-pointer values!");
+ emitConstant(MCE.getJumpTableEntryAddress(MO1.getJumpTableIndex()), 4);
} else {
emitConstant(MO1.getImmedValue(), sizeOfImm(Desc));
}
case X86II::MRMSrcReg:
MCE.emitByte(BaseOpcode);
-
emitRegModRMByte(MI.getOperand(1).getReg(),
getX86RegNum(MI.getOperand(0).getReg()));
if (MI.getNumOperands() == 3)
assert(0 && "Unknown operand!");
}
break;
+
+ case X86II::MRMInitReg:
+ MCE.emitByte(BaseOpcode);
+ emitRegModRMByte(MI.getOperand(0).getReg(),
+ getX86RegNum(MI.getOperand(0).getReg()));
+ break;
}
}