public:
static char ID;
explicit Emitter(X86TargetMachine &tm, MachineCodeEmitter &mce)
- : MachineFunctionPass((intptr_t)&ID), II(0), TD(0), TM(tm),
+ : MachineFunctionPass(&ID), II(0), TD(0), TM(tm),
MCE(mce), PICBaseOffset(0), Is64BitMode(false),
IsPIC(TM.getRelocationModel() == Reloc::PIC_) {}
Emitter(X86TargetMachine &tm, MachineCodeEmitter &mce,
const X86InstrInfo &ii, const TargetData &td, bool is64)
- : MachineFunctionPass((intptr_t)&ID), II(&ii), TD(&td), TM(tm),
+ : MachineFunctionPass(&ID), II(&ii), TD(&td), TM(tm),
MCE(mce), PICBaseOffset(0), Is64BitMode(is64),
IsPIC(TM.getRelocationModel() == Reloc::PIC_) {}
private:
void emitPCRelativeBlockAddress(MachineBasicBlock *MBB);
void emitGlobalAddress(GlobalValue *GV, unsigned Reloc,
- int Disp = 0, intptr_t PCAdj = 0,
- bool NeedStub = false, bool IsLazy = false);
+ intptr_t Disp = 0, intptr_t PCAdj = 0,
+ bool NeedStub = false, bool Indirect = false);
void emitExternalSymbolAddress(const char *ES, unsigned Reloc);
- void emitConstPoolAddress(unsigned CPI, unsigned Reloc, int Disp = 0,
+ void emitConstPoolAddress(unsigned CPI, unsigned Reloc, intptr_t Disp = 0,
intptr_t PCAdj = 0);
void emitJumpTableAddress(unsigned JTI, unsigned Reloc,
intptr_t PCAdj = 0);
intptr_t PCAdj = 0);
void emitRegModRMByte(unsigned ModRMReg, unsigned RegOpcodeField);
+ void emitRegModRMByte(unsigned RegOpcodeField);
void emitSIBByte(unsigned SS, unsigned Index, unsigned Base);
void emitConstant(uint64_t Val, unsigned Size);
unsigned getX86RegNum(unsigned RegNo) const;
- bool gvNeedsLazyPtr(const GlobalValue *GV);
+ bool gvNeedsNonLazyPtr(const GlobalValue *GV);
};
char Emitter::ID = 0;
}
}
bool Emitter::runOnMachineFunction(MachineFunction &MF) {
- assert((MF.getTarget().getRelocationModel() != Reloc::Default ||
- MF.getTarget().getRelocationModel() != Reloc::Static) &&
- "JIT relocation model must be set to static or default!");
-
+
MCE.setModuleInfo(&getAnalysis<MachineModuleInfo>());
II = TM.getInstrInfo();
/// this is part of a "take the address of a global" instruction.
///
void Emitter::emitGlobalAddress(GlobalValue *GV, unsigned Reloc,
- int Disp /* = 0 */, intptr_t PCAdj /* = 0 */,
+ intptr_t Disp /* = 0 */,
+ intptr_t PCAdj /* = 0 */,
bool NeedStub /* = false */,
- bool isLazy /* = false */) {
+ bool Indirect /* = false */) {
intptr_t RelocCST = 0;
if (Reloc == X86::reloc_picrel_word)
RelocCST = PICBaseOffset;
else if (Reloc == X86::reloc_pcrel_word)
RelocCST = PCAdj;
- MachineRelocation MR = isLazy
- ? MachineRelocation::getGVLazyPtr(MCE.getCurrentPCOffset(), Reloc,
- GV, RelocCST, NeedStub)
+ MachineRelocation MR = Indirect
+ ? MachineRelocation::getIndirectSymbol(MCE.getCurrentPCOffset(), Reloc,
+ GV, RelocCST, NeedStub)
: MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc,
GV, RelocCST, NeedStub);
MCE.addRelocation(MR);
+ // The relocated value will be added to the displacement
if (Reloc == X86::reloc_absolute_dword)
- MCE.emitWordLE(0);
- MCE.emitWordLE(Disp); // The relocated value will be added to the displacement
+ MCE.emitDWordLE(Disp);
+ else
+ MCE.emitWordLE((int32_t)Disp);
}
/// emitExternalSymbolAddress - Arrange for the address of an external symbol to
MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
Reloc, ES, RelocCST));
if (Reloc == X86::reloc_absolute_dword)
+ MCE.emitDWordLE(0);
+ else
MCE.emitWordLE(0);
- MCE.emitWordLE(0);
}
/// emitConstPoolAddress - Arrange for the address of an constant pool
/// to be emitted to the current location in the function, and allow it to be PC
/// relative.
void Emitter::emitConstPoolAddress(unsigned CPI, unsigned Reloc,
- int Disp /* = 0 */,
+ intptr_t Disp /* = 0 */,
intptr_t PCAdj /* = 0 */) {
intptr_t RelocCST = 0;
if (Reloc == X86::reloc_picrel_word)
RelocCST = PCAdj;
MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
Reloc, CPI, RelocCST));
+ // The relocated value will be added to the displacement
if (Reloc == X86::reloc_absolute_dword)
- MCE.emitWordLE(0);
- MCE.emitWordLE(Disp); // The relocated value will be added to the displacement
+ MCE.emitDWordLE(Disp);
+ else
+ MCE.emitWordLE((int32_t)Disp);
}
/// emitJumpTableAddress - Arrange for the address of a jump table to
RelocCST = PCAdj;
MCE.addRelocation(MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(),
Reloc, JTI, RelocCST));
+ // The relocated value will be added to the displacement
if (Reloc == X86::reloc_absolute_dword)
+ MCE.emitDWordLE(0);
+ else
MCE.emitWordLE(0);
- MCE.emitWordLE(0); // The relocated value will be added to the displacement
}
unsigned Emitter::getX86RegNum(unsigned RegNo) const {
MCE.emitByte(ModRMByte(3, RegOpcodeFld, getX86RegNum(ModRMReg)));
}
+void Emitter::emitRegModRMByte(unsigned RegOpcodeFld) {
+ MCE.emitByte(ModRMByte(3, RegOpcodeFld, 0));
+}
+
void Emitter::emitSIBByte(unsigned SS, unsigned Index, unsigned Base) {
// SIB byte is in the same format as the ModRMByte...
MCE.emitByte(ModRMByte(SS, Index, Base));
return Value == (signed char)Value;
}
-bool Emitter::gvNeedsLazyPtr(const GlobalValue *GV) {
- return !Is64BitMode &&
+bool Emitter::gvNeedsNonLazyPtr(const GlobalValue *GV) {
+ // For Darwin, simulate the linktime GOT by using the same non-lazy-pointer
+ // mechanism as 32-bit mode.
+ return (!Is64BitMode || TM.getSubtarget<X86Subtarget>().isTargetDarwin()) &&
TM.getSubtarget<X86Subtarget>().GVRequiresExtraLoad(GV, TM, false);
}
// Otherwise, this is something that requires a relocation. Emit it as such
// now.
- if (RelocOp->isGlobalAddress()) {
+ if (RelocOp->isGlobal()) {
// In 64-bit static small code model, we could potentially emit absolute.
// But it's probably not beneficial.
// 89 05 00 00 00 00 mov %eax,0(%rip) # PC-relative
unsigned rt = Is64BitMode ? X86::reloc_pcrel_word
: (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word);
bool NeedStub = isa<Function>(RelocOp->getGlobal());
- bool isLazy = gvNeedsLazyPtr(RelocOp->getGlobal());
+ bool Indirect = gvNeedsNonLazyPtr(RelocOp->getGlobal());
emitGlobalAddress(RelocOp->getGlobal(), rt, RelocOp->getOffset(),
- PCAdj, NeedStub, isLazy);
- } else if (RelocOp->isConstantPoolIndex()) {
+ PCAdj, NeedStub, Indirect);
+ } else if (RelocOp->isCPI()) {
unsigned rt = Is64BitMode ? X86::reloc_pcrel_word : X86::reloc_picrel_word;
emitConstPoolAddress(RelocOp->getIndex(), rt,
RelocOp->getOffset(), PCAdj);
- } else if (RelocOp->isJumpTableIndex()) {
+ } else if (RelocOp->isJTI()) {
unsigned rt = Is64BitMode ? X86::reloc_pcrel_word : X86::reloc_picrel_word;
emitJumpTableAddress(RelocOp->getIndex(), rt, PCAdj);
} else {
const MachineOperand *DispForReloc = 0;
// Figure out what sort of displacement we have to handle here.
- if (Op3.isGlobalAddress()) {
+ if (Op3.isGlobal()) {
DispForReloc = &Op3;
- } else if (Op3.isConstantPoolIndex()) {
+ } else if (Op3.isCPI()) {
if (Is64BitMode || IsPIC) {
DispForReloc = &Op3;
} else {
DispVal += MCE.getConstantPoolEntryAddress(Op3.getIndex());
DispVal += Op3.getOffset();
}
- } else if (Op3.isJumpTableIndex()) {
+ } else if (Op3.isJTI()) {
if (Is64BitMode || IsPIC) {
DispForReloc = &Op3;
} else {
unsigned BaseReg = Base.getReg();
// Is a SIB byte needed?
- if (IndexReg.getReg() == 0 &&
+ if ((!Is64BitMode || DispForReloc) && IndexReg.getReg() == 0 &&
(BaseReg == 0 || getX86RegNum(BaseReg) != N86::ESP)) {
if (BaseReg == 0) { // Just a displacement?
// Emit special case [disp32] encoding
if (BaseReg == 0) {
// Handle the SIB byte for the case where there is no base. The
// displacement has already been output.
- assert(IndexReg.getReg() && "Index register must be specified!");
- emitSIBByte(SS, getX86RegNum(IndexReg.getReg()), 5);
+ unsigned IndexRegNo;
+ if (IndexReg.getReg())
+ IndexRegNo = getX86RegNum(IndexReg.getReg());
+ else
+ IndexRegNo = 4; // For example [ESP+1*<noreg>+4]
+ emitSIBByte(SS, IndexRegNo, 5);
} else {
unsigned BaseRegNo = getX86RegNum(BaseReg);
unsigned IndexRegNo;
// Emit the lock opcode prefix as needed.
if (Desc->TSFlags & X86II::LOCK) MCE.emitByte(0xF0);
+ // Emit segment override opcode prefix as needed.
+ switch (Desc->TSFlags & X86II::SegOvrMask) {
+ case X86II::FS:
+ MCE.emitByte(0x64);
+ break;
+ case X86II::GS:
+ MCE.emitByte(0x65);
+ break;
+ default: assert(0 && "Invalid segment!");
+ case 0: break; // No segment override!
+ }
+
// Emit the repeat opcode prefix as needed.
if ((Desc->TSFlags & X86II::Op0Mask) == X86II::REP) MCE.emitByte(0xF3);
default:
assert(0 && "psuedo instructions should be removed before code emission");
break;
- case TargetInstrInfo::INLINEASM:
- assert(0 && "JIT does not support inline asm!\n");
+ case TargetInstrInfo::INLINEASM: {
+ // We allow inline assembler nodes with empty bodies - they can
+ // implicitly define registers, which is ok for JIT.
+ if (MI.getOperand(0).getSymbolName()[0]) {
+ assert(0 && "JIT does not support inline asm!\n");
+ abort();
+ }
break;
+ }
case TargetInstrInfo::DBG_LABEL:
case TargetInstrInfo::EH_LABEL:
MCE.emitLabel(MI.getOperand(0).getImm());
case X86::DWARF_LOC:
case X86::FP_REG_KILL:
break;
+ case X86::TLS_tp: {
+ MCE.emitByte(BaseOpcode);
+ unsigned RegOpcodeField = getX86RegNum(MI.getOperand(0).getReg());
+ MCE.emitByte(ModRMByte(0, RegOpcodeField, 5));
+ emitConstant(0, 4);
+ break;
+ }
+ case X86::TLS_gs_ri: {
+ MCE.emitByte(BaseOpcode);
+ unsigned RegOpcodeField = getX86RegNum(MI.getOperand(0).getReg());
+ MCE.emitByte(ModRMByte(0, RegOpcodeField, 5));
+ GlobalValue* GV = MI.getOperand(1).getGlobal();
+ unsigned rt = Is64BitMode ? X86::reloc_pcrel_word
+ : (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word);
+ emitGlobalAddress(GV, rt);
+ break;
+ }
case X86::MOVPC32r: {
// This emits the "call" portion of this pseudo instruction.
MCE.emitByte(BaseOpcode);
emitConstant(0, X86InstrInfo::sizeOfImm(Desc));
// Remember PIC base.
- PICBaseOffset = MCE.getCurrentPCOffset();
+ PICBaseOffset = (intptr_t) MCE.getCurrentPCOffset();
X86JITInfo *JTI = TM.getJITInfo();
JTI->setPICBase(MCE.getCurrentPCValue());
break;
if (CurOp != NumOps) {
const MachineOperand &MO = MI.getOperand(CurOp++);
- if (MO.isMachineBasicBlock()) {
+
+ DOUT << "RawFrm CurOp " << CurOp << "\n";
+ DOUT << "isMBB " << MO.isMBB() << "\n";
+ DOUT << "isGlobal " << MO.isGlobal() << "\n";
+ DOUT << "isSymbol " << MO.isSymbol() << "\n";
+ DOUT << "isImm " << MO.isImm() << "\n";
+
+ if (MO.isMBB()) {
emitPCRelativeBlockAddress(MO.getMBB());
- } else if (MO.isGlobalAddress()) {
- bool NeedStub = (Is64BitMode && TM.getCodeModel() == CodeModel::Large)
- || Opcode == X86::TAILJMPd;
+ } else if (MO.isGlobal()) {
+ // Assume undefined functions may be outside the Small codespace.
+ bool NeedStub =
+ (Is64BitMode &&
+ (TM.getCodeModel() == CodeModel::Large ||
+ TM.getSubtarget<X86Subtarget>().isTargetDarwin())) ||
+ Opcode == X86::TAILJMPd;
emitGlobalAddress(MO.getGlobal(), X86::reloc_pcrel_word,
- 0, 0, NeedStub);
- } else if (MO.isExternalSymbol()) {
+ MO.getOffset(), 0, NeedStub);
+ } else if (MO.isSymbol()) {
emitExternalSymbolAddress(MO.getSymbolName(), X86::reloc_pcrel_word);
- } else if (MO.isImmediate()) {
- emitConstant(MO.getImm(), X86InstrInfo::sizeOfImm(Desc));
+ } else if (MO.isImm()) {
+ if (Opcode == X86::CALLpcrel32 || Opcode == X86::CALL64pcrel32) {
+ // Fix up immediate operand for pc relative calls.
+ intptr_t Imm = (intptr_t)MO.getImm();
+ Imm = Imm - MCE.getCurrentPCValue() - 4;
+ emitConstant(Imm, X86InstrInfo::sizeOfImm(Desc));
+ } else
+ emitConstant(MO.getImm(), X86InstrInfo::sizeOfImm(Desc));
} else {
assert(0 && "Unknown RawFrm operand!");
}
if (CurOp != NumOps) {
const MachineOperand &MO1 = MI.getOperand(CurOp++);
unsigned Size = X86InstrInfo::sizeOfImm(Desc);
- if (MO1.isImmediate())
+ if (MO1.isImm())
emitConstant(MO1.getImm(), Size);
else {
unsigned rt = Is64BitMode ? X86::reloc_pcrel_word
: (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word);
+ // This should not occur on Darwin for relocatable objects.
if (Opcode == X86::MOV64ri)
rt = X86::reloc_absolute_dword; // FIXME: add X86II flag?
- if (MO1.isGlobalAddress()) {
+ if (MO1.isGlobal()) {
bool NeedStub = isa<Function>(MO1.getGlobal());
- bool isLazy = gvNeedsLazyPtr(MO1.getGlobal());
+ bool Indirect = gvNeedsNonLazyPtr(MO1.getGlobal());
emitGlobalAddress(MO1.getGlobal(), rt, MO1.getOffset(), 0,
- NeedStub, isLazy);
- } else if (MO1.isExternalSymbol())
+ NeedStub, Indirect);
+ } else if (MO1.isSymbol())
emitExternalSymbolAddress(MO1.getSymbolName(), rt);
- else if (MO1.isConstantPoolIndex())
+ else if (MO1.isCPI())
emitConstPoolAddress(MO1.getIndex(), rt);
- else if (MO1.isJumpTableIndex())
+ else if (MO1.isJTI())
emitJumpTableAddress(MO1.getIndex(), rt);
}
}
case X86II::MRM0r: case X86II::MRM1r:
case X86II::MRM2r: case X86II::MRM3r:
case X86II::MRM4r: case X86II::MRM5r:
- case X86II::MRM6r: case X86II::MRM7r:
+ case X86II::MRM6r: case X86II::MRM7r: {
MCE.emitByte(BaseOpcode);
- emitRegModRMByte(MI.getOperand(CurOp++).getReg(),
- (Desc->TSFlags & X86II::FormMask)-X86II::MRM0r);
+
+ // Special handling of lfence and mfence.
+ if (Desc->getOpcode() == X86::LFENCE ||
+ Desc->getOpcode() == X86::MFENCE)
+ emitRegModRMByte((Desc->TSFlags & X86II::FormMask)-X86II::MRM0r);
+ else
+ emitRegModRMByte(MI.getOperand(CurOp++).getReg(),
+ (Desc->TSFlags & X86II::FormMask)-X86II::MRM0r);
if (CurOp != NumOps) {
const MachineOperand &MO1 = MI.getOperand(CurOp++);
unsigned Size = X86InstrInfo::sizeOfImm(Desc);
- if (MO1.isImmediate())
+ if (MO1.isImm())
emitConstant(MO1.getImm(), Size);
else {
unsigned rt = Is64BitMode ? X86::reloc_pcrel_word
: (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word);
if (Opcode == X86::MOV64ri32)
rt = X86::reloc_absolute_word; // FIXME: add X86II flag?
- if (MO1.isGlobalAddress()) {
+ if (MO1.isGlobal()) {
bool NeedStub = isa<Function>(MO1.getGlobal());
- bool isLazy = gvNeedsLazyPtr(MO1.getGlobal());
+ bool Indirect = gvNeedsNonLazyPtr(MO1.getGlobal());
emitGlobalAddress(MO1.getGlobal(), rt, MO1.getOffset(), 0,
- NeedStub, isLazy);
- } else if (MO1.isExternalSymbol())
+ NeedStub, Indirect);
+ } else if (MO1.isSymbol())
emitExternalSymbolAddress(MO1.getSymbolName(), rt);
- else if (MO1.isConstantPoolIndex())
+ else if (MO1.isCPI())
emitConstPoolAddress(MO1.getIndex(), rt);
- else if (MO1.isJumpTableIndex())
+ else if (MO1.isJTI())
emitJumpTableAddress(MO1.getIndex(), rt);
}
}
break;
+ }
case X86II::MRM0m: case X86II::MRM1m:
case X86II::MRM2m: case X86II::MRM3m:
case X86II::MRM4m: case X86II::MRM5m:
case X86II::MRM6m: case X86II::MRM7m: {
intptr_t PCAdj = (CurOp+4 != NumOps) ?
- (MI.getOperand(CurOp+4).isImmediate() ? X86InstrInfo::sizeOfImm(Desc) : 4) : 0;
+ (MI.getOperand(CurOp+4).isImm() ? X86InstrInfo::sizeOfImm(Desc) : 4) : 0;
MCE.emitByte(BaseOpcode);
emitMemModRMByte(MI, CurOp, (Desc->TSFlags & X86II::FormMask)-X86II::MRM0m,
if (CurOp != NumOps) {
const MachineOperand &MO = MI.getOperand(CurOp++);
unsigned Size = X86InstrInfo::sizeOfImm(Desc);
- if (MO.isImmediate())
+ if (MO.isImm())
emitConstant(MO.getImm(), Size);
else {
unsigned rt = Is64BitMode ? X86::reloc_pcrel_word
: (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word);
if (Opcode == X86::MOV64mi32)
rt = X86::reloc_absolute_word; // FIXME: add X86II flag?
- if (MO.isGlobalAddress()) {
+ if (MO.isGlobal()) {
bool NeedStub = isa<Function>(MO.getGlobal());
- bool isLazy = gvNeedsLazyPtr(MO.getGlobal());
+ bool Indirect = gvNeedsNonLazyPtr(MO.getGlobal());
emitGlobalAddress(MO.getGlobal(), rt, MO.getOffset(), 0,
- NeedStub, isLazy);
- } else if (MO.isExternalSymbol())
+ NeedStub, Indirect);
+ } else if (MO.isSymbol())
emitExternalSymbolAddress(MO.getSymbolName(), rt);
- else if (MO.isConstantPoolIndex())
+ else if (MO.isCPI())
emitConstPoolAddress(MO.getIndex(), rt);
- else if (MO.isJumpTableIndex())
+ else if (MO.isJTI())
emitJumpTableAddress(MO.getIndex(), rt);
}
}