Turn off the old way of handling debug information in the code generator. Use

[oota-llvm.git] / lib / Target / X86 / X86FastISel.cpp

diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp
index f7784b407e74e75d00c3ca2635d550ba6f611e88..d85d2fbea3fcfb18d87e699ec48ae42140569147 100644 (file)
--- a/lib/Target/X86/X86FastISel.cpp
+++ b/lib/Target/X86/X86FastISel.cpp
@@ -51,6 +51,7 @@ class X86FastISel : public FastISel {
 public:
   explicit X86FastISel(MachineFunction &mf,
                        MachineModuleInfo *mmi,
+                       DwarfWriter *dw,
                        DenseMap<const Value *, unsigned> &vm,
                        DenseMap<const BasicBlock *, MachineBasicBlock *> &bm,
                        DenseMap<const AllocaInst *, int> &am
@@ -58,7 +59,7 @@ public:
                        , SmallSet<Instruction*, 8> &cil
 #endif
                        )
-    : FastISel(mf, mmi, vm, bm, am
+    : FastISel(mf, mmi, dw, vm, bm, am
 #ifndef NDEBUG
                , cil
 #endif
@@ -782,9 +783,9 @@ bool X86FastISel::X86SelectBranch(Instruction *I) {
             const MachineInstr &MI = *RI;
 
             if (MI.modifiesRegister(Reg)) {
-              unsigned Src, Dst;
+              unsigned Src, Dst, SrcSR, DstSR;
 
-              if (getInstrInfo()->isMoveInstr(MI, Src, Dst)) {
+              if (getInstrInfo()->isMoveInstr(MI, Src, Dst, SrcSR, DstSR)) {
                 Reg = Src;
                 continue;
               }
@@ -1010,7 +1011,8 @@ bool X86FastISel::X86SelectTrunc(Instruction *I) {
   BuildMI(MBB, TII.get(CopyOpc), CopyReg).addReg(InputReg);
 
   // Then issue an extract_subreg.
-  unsigned ResultReg = FastEmitInst_extractsubreg(CopyReg, X86::SUBREG_8BIT);
+  unsigned ResultReg = FastEmitInst_extractsubreg(DstVT.getSimpleVT(),
+                                                  CopyReg, X86::SUBREG_8BIT);
   if (!ResultReg)
     return false;
 
@@ -1512,6 +1514,7 @@ unsigned X86FastISel::TargetMaterializeAlloca(AllocaInst *C) {
 namespace llvm {
   llvm::FastISel *X86::createFastISel(MachineFunction &mf,
                         MachineModuleInfo *mmi,
+                        DwarfWriter *dw,
                         DenseMap<const Value *, unsigned> &vm,
                         DenseMap<const BasicBlock *, MachineBasicBlock *> &bm,
                         DenseMap<const AllocaInst *, int> &am
@@ -1519,7 +1522,7 @@ namespace llvm {
                         , SmallSet<Instruction*, 8> &cil
 #endif
                         ) {
-    return new X86FastISel(mf, mmi, vm, bm, am
+    return new X86FastISel(mf, mmi, dw, vm, bm, am
 #ifndef NDEBUG
                            , cil
 #endif