-//===-- FloatingPoint.cpp - Floating point Reg -> Stack converter ---------===//
+//===-- X86FloatingPoint.cpp - Floating point Reg -> Stack converter ------===//
//
// The LLVM Compiler Infrastructure
//
#include "llvm/CodeGen/Passes.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
-#include "llvm/Function.h" // FIXME: remove when using MBB CFG!
-#include "llvm/Support/CFG.h" // FIXME: remove when using MBB CFG!
-#include "Support/Debug.h"
-#include "Support/DepthFirstIterator.h"
-#include "Support/Statistic.h"
-#include "Support/STLExtras.h"
+#include "llvm/Support/Debug.h"
+#include "llvm/ADT/DepthFirstIterator.h"
+#include "llvm/ADT/Statistic.h"
+#include "llvm/ADT/STLExtras.h"
#include <algorithm>
#include <set>
using namespace llvm;
void handleOneArgFP(MachineBasicBlock::iterator &I);
void handleOneArgFPRW(MachineBasicBlock::iterator &I);
void handleTwoArgFP(MachineBasicBlock::iterator &I);
+ void handleCompareFP(MachineBasicBlock::iterator &I);
void handleCondMovFP(MachineBasicBlock::iterator &I);
void handleSpecialFP(MachineBasicBlock::iterator &I);
};
/// register references into FP stack references.
///
bool FPS::runOnMachineFunction(MachineFunction &MF) {
+ // We only need to run this pass if there are any FP registers used in this
+ // function. If it is all integer, there is nothing for us to do!
+ const bool *PhysRegsUsed = MF.getUsedPhysregs();
+ bool FPIsUsed = false;
+
+ assert(X86::FP6 == X86::FP0+6 && "Register enums aren't sorted right!");
+ for (unsigned i = 0; i <= 6; ++i)
+ if (PhysRegsUsed[X86::FP0+i]) {
+ FPIsUsed = true;
+ break;
+ }
+
+ // Early exit.
+ if (!FPIsUsed) return false;
+
LV = &getAnalysis<LiveVariables>();
StackTop = 0;
- // Figure out the mapping of MBB's to BB's.
- //
- // FIXME: Eventually we should be able to traverse the MBB CFG directly, and
- // we will need to extend this when one llvm basic block can codegen to
- // multiple MBBs.
- //
- // FIXME again: Just use the mapping established by LiveVariables!
- //
- std::map<const BasicBlock*, MachineBasicBlock *> MBBMap;
- for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
- MBBMap[I->getBasicBlock()] = I;
-
// Process the function in depth first order so that we process at least one
// of the predecessors for every reachable block in the function.
- std::set<const BasicBlock*> Processed;
- const BasicBlock *Entry = MF.getFunction()->begin();
+ std::set<MachineBasicBlock*> Processed;
+ MachineBasicBlock *Entry = MF.begin();
bool Changed = false;
- for (df_ext_iterator<const BasicBlock*, std::set<const BasicBlock*> >
+ for (df_ext_iterator<MachineBasicBlock*, std::set<MachineBasicBlock*> >
I = df_ext_begin(Entry, Processed), E = df_ext_end(Entry, Processed);
I != E; ++I)
- Changed |= processBasicBlock(MF, *MBBMap[*I]);
-
- assert(MBBMap.size() == Processed.size() &&
- "Doesn't handle unreachable code yet!");
+ Changed |= processBasicBlock(MF, **I);
return Changed;
}
/// transforming FP instructions into their stack form.
///
bool FPS::processBasicBlock(MachineFunction &MF, MachineBasicBlock &BB) {
- const TargetInstrInfo &TII = MF.getTarget().getInstrInfo();
+ const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
bool Changed = false;
MBB = &BB;
++NumFP; // Keep track of # of pseudo instrs
DEBUG(std::cerr << "\nFPInst:\t";
- MI->print(std::cerr, MF.getTarget()));
+ MI->print(std::cerr, &(MF.getTarget())));
// Get dead variables list now because the MI pointer may be deleted as part
// of processing!
case X86II::ZeroArgFP: handleZeroArgFP(I); break;
case X86II::OneArgFP: handleOneArgFP(I); break; // fstp ST(0)
case X86II::OneArgFPRW: handleOneArgFPRW(I); break; // ST(0) = fsqrt(ST(0))
- case X86II::TwoArgFP: handleTwoArgFP(I); break;
+ case X86II::TwoArgFP: handleTwoArgFP(I); break;
+ case X86II::CompareFP: handleCompareFP(I); break;
case X86II::CondMovFP: handleCondMovFP(I); break;
case X86II::SpecialFP: handleSpecialFP(I); break;
default: assert(0 && "Unknown FP Type!");
unsigned Reg = IB->second;
if (Reg >= X86::FP0 && Reg <= X86::FP6) {
DEBUG(std::cerr << "Register FP#" << Reg-X86::FP0 << " is dead!\n");
- ++I; // Insert fxch AFTER the instruction
- moveToTop(Reg-X86::FP0, I); // Insert fxch if necessary
- --I; // Move to fxch or old instruction
- popStackAfter(I); // Pop the top of the stack, killing value
+ freeStackSlotAfter(I, Reg-X86::FP0);
}
}
// Rewind to first instruction newly inserted.
while (Start != BB.begin() && prior(Start) != PrevI) --Start;
std::cerr << "Inserted instructions:\n\t";
- Start->print(std::cerr, MF.getTarget());
+ Start->print(std::cerr, &MF.getTarget());
while (++Start != next(I));
}
dumpStack();
{ X86::FSUBRrST0, X86::FSUBRPrST0 },
{ X86::FSUBrST0 , X86::FSUBPrST0 },
+ { X86::FUCOMIr , X86::FUCOMIPr },
+
{ X86::FUCOMPr , X86::FUCOMPPr },
{ X86::FUCOMr , X86::FUCOMPr },
};
// ForwardST0Table - Map: A = B op C into: ST(0) = ST(0) op ST(i)
static const TableEntry ForwardST0Table[] = {
- { X86::FpADD, X86::FADDST0r },
- { X86::FpDIV, X86::FDIVST0r },
- { X86::FpMUL, X86::FMULST0r },
- { X86::FpSUB, X86::FSUBST0r },
- { X86::FpUCOM, X86::FUCOMr },
+ { X86::FpADD , X86::FADDST0r },
+ { X86::FpDIV , X86::FDIVST0r },
+ { X86::FpMUL , X86::FMULST0r },
+ { X86::FpSUB , X86::FSUBST0r },
};
// ReverseST0Table - Map: A = B op C into: ST(0) = ST(i) op ST(0)
static const TableEntry ReverseST0Table[] = {
- { X86::FpADD, X86::FADDST0r }, // commutative
- { X86::FpDIV, X86::FDIVRST0r },
- { X86::FpMUL, X86::FMULST0r }, // commutative
- { X86::FpSUB, X86::FSUBRST0r },
- { X86::FpUCOM, ~0 },
+ { X86::FpADD , X86::FADDST0r }, // commutative
+ { X86::FpDIV , X86::FDIVRST0r },
+ { X86::FpMUL , X86::FMULST0r }, // commutative
+ { X86::FpSUB , X86::FSUBRST0r },
};
// ForwardSTiTable - Map: A = B op C into: ST(i) = ST(0) op ST(i)
static const TableEntry ForwardSTiTable[] = {
- { X86::FpADD, X86::FADDrST0 }, // commutative
- { X86::FpDIV, X86::FDIVRrST0 },
- { X86::FpMUL, X86::FMULrST0 }, // commutative
- { X86::FpSUB, X86::FSUBRrST0 },
- { X86::FpUCOM, X86::FUCOMr },
+ { X86::FpADD , X86::FADDrST0 }, // commutative
+ { X86::FpDIV , X86::FDIVRrST0 },
+ { X86::FpMUL , X86::FMULrST0 }, // commutative
+ { X86::FpSUB , X86::FSUBRrST0 },
};
// ReverseSTiTable - Map: A = B op C into: ST(i) = ST(i) op ST(0)
static const TableEntry ReverseSTiTable[] = {
- { X86::FpADD, X86::FADDrST0 },
- { X86::FpDIV, X86::FDIVrST0 },
- { X86::FpMUL, X86::FMULrST0 },
- { X86::FpSUB, X86::FSUBrST0 },
- { X86::FpUCOM, ~0 },
+ { X86::FpADD , X86::FADDrST0 },
+ { X86::FpDIV , X86::FDIVrST0 },
+ { X86::FpMUL , X86::FMULrST0 },
+ { X86::FpSUB , X86::FSUBrST0 },
};
/// ST(i) = fsub ST(0), ST(i)
/// ST(0) = fsubr ST(0), ST(i)
/// ST(i) = fsubr ST(0), ST(i)
-///
-/// In addition to three address instructions, this also handles the FpUCOM
-/// instruction which only has two operands, but no destination. This
-/// instruction is also annoying because there is no "reverse" form of it
-/// available.
///
void FPS::handleTwoArgFP(MachineBasicBlock::iterator &I) {
ASSERT_SORTED(ForwardST0Table); ASSERT_SORTED(ReverseST0Table);
MachineInstr *MI = I;
unsigned NumOperands = MI->getNumOperands();
- assert(NumOperands == 3 ||
- (NumOperands == 2 && MI->getOpcode() == X86::FpUCOM) &&
- "Illegal TwoArgFP instruction!");
+ assert(NumOperands == 3 && "Illegal TwoArgFP instruction!");
unsigned Dest = getFPReg(MI->getOperand(0));
unsigned Op0 = getFPReg(MI->getOperand(NumOperands-2));
unsigned Op1 = getFPReg(MI->getOperand(NumOperands-1));
KillsOp1 |= (KI->second == X86::FP0+Op1);
}
- // If this is an FpUCOM instruction, we must make sure the first operand is on
- // the top of stack, the other one can be anywhere...
- if (MI->getOpcode() == X86::FpUCOM)
- moveToTop(Op0, I);
-
unsigned TOS = getStackEntry(0);
// One of our operands must be on the top of the stack. If neither is yet, we
Op0 = TOS = Dest;
KillsOp0 = true;
}
- } else if (!KillsOp0 && !KillsOp1 && MI->getOpcode() != X86::FpUCOM) {
+ } else if (!KillsOp0 && !KillsOp1) {
// If we DO have one of our operands at the top of the stack, but we don't
// have a dead operand, we must duplicate one of the operands to a new slot
// on the stack.
// Now we know that one of our operands is on the top of the stack, and at
// least one of our operands is killed by this instruction.
- assert((TOS == Op0 || TOS == Op1) &&
- (KillsOp0 || KillsOp1 || MI->getOpcode() == X86::FpUCOM) &&
+ assert((TOS == Op0 || TOS == Op1) && (KillsOp0 || KillsOp1) &&
"Stack conditions not set up right!");
// We decide which form to use based on what is on the top of the stack, and
popStackAfter(I); // Pop the top of stack
}
- // Insert an explicit pop of the "updated" operand for FUCOM
- if (MI->getOpcode() == X86::FpUCOM) {
- if (KillsOp0 && !KillsOp1)
- popStackAfter(I); // If we kill the first operand, pop it!
- else if (KillsOp1 && Op0 != Op1)
- freeStackSlotAfter(I, Op1);
- }
-
// Update stack information so that we know the destination register is now on
// the stack.
- if (MI->getOpcode() != X86::FpUCOM) {
- unsigned UpdatedSlot = getSlot(updateST0 ? TOS : NotTOS);
- assert(UpdatedSlot < StackTop && Dest < 7);
- Stack[UpdatedSlot] = Dest;
- RegMap[Dest] = UpdatedSlot;
- }
+ unsigned UpdatedSlot = getSlot(updateST0 ? TOS : NotTOS);
+ assert(UpdatedSlot < StackTop && Dest < 7);
+ Stack[UpdatedSlot] = Dest;
+ RegMap[Dest] = UpdatedSlot;
delete MI; // Remove the old instruction
}
+/// handleCompareFP - Handle FUCOM and FUCOMI instructions, which have two FP
+/// register arguments and no explicit destinations.
+///
+void FPS::handleCompareFP(MachineBasicBlock::iterator &I) {
+ ASSERT_SORTED(ForwardST0Table); ASSERT_SORTED(ReverseST0Table);
+ ASSERT_SORTED(ForwardSTiTable); ASSERT_SORTED(ReverseSTiTable);
+ MachineInstr *MI = I;
+
+ unsigned NumOperands = MI->getNumOperands();
+ assert(NumOperands == 2 && "Illegal FUCOM* instruction!");
+ unsigned Op0 = getFPReg(MI->getOperand(NumOperands-2));
+ unsigned Op1 = getFPReg(MI->getOperand(NumOperands-1));
+ bool KillsOp0 = false, KillsOp1 = false;
+
+ for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
+ E = LV->killed_end(MI); KI != E; ++KI) {
+ KillsOp0 |= (KI->second == X86::FP0+Op0);
+ KillsOp1 |= (KI->second == X86::FP0+Op1);
+ }
+
+ // Make sure the first operand is on the top of stack, the other one can be
+ // anywhere.
+ moveToTop(Op0, I);
+
+ MI->getOperand(0).setReg(getSTReg(Op1));
+ MI->RemoveOperand(1);
+
+ // If any of the operands are killed by this instruction, free them.
+ if (KillsOp0) freeStackSlotAfter(I, Op0);
+ if (KillsOp1 && Op0 != Op1) freeStackSlotAfter(I, Op1);
+}
+
/// handleCondMovFP - Handle two address conditional move instructions. These
/// instructions move a st(i) register to st(0) iff a condition is true. These
/// instructions require that the first operand is at the top of the stack, but
MI->getOperand(0).setReg(getSTReg(Op1));
// If we kill the second operand, make sure to pop it from the stack.
- for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
- E = LV->killed_end(MI); KI != E; ++KI)
- if (KI->second == X86::FP0+Op1) {
- // Get this value off of the register stack.
- freeStackSlotAfter(I, Op1);
- break;
- }
+ if (Op0 != Op1)
+ for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
+ E = LV->killed_end(MI); KI != E; ++KI)
+ if (KI->second == X86::FP0+Op1) {
+ // Get this value off of the register stack.
+ freeStackSlotAfter(I, Op1);
+ break;
+ }
}
projects / oota-llvm.git / blobdiff