Move some SIMD fragment code into X86InstrFragmentsSIMD so that the

[oota-llvm.git] / lib / Target / X86 / X86FloatingPointRegKill.cpp

diff --git a/lib/Target/X86/X86FloatingPointRegKill.cpp b/lib/Target/X86/X86FloatingPointRegKill.cpp
index 34f45fd8cc294f3a194ba5c0dd3025f37489a8a5..2c98b96c510b9a6ab418e4efb613cd28bb09cbee 100644 (file)
--- a/lib/Target/X86/X86FloatingPointRegKill.cpp
+++ b/lib/Target/X86/X86FloatingPointRegKill.cpp
@@ -14,7 +14,6 @@
 #define DEBUG_TYPE "x86-codegen"
 #include "X86.h"
 #include "X86InstrInfo.h"
-#include "X86Subtarget.h"
 #include "llvm/Instructions.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
@@ -53,46 +52,51 @@ FunctionPass *llvm::createX87FPRegKillInserterPass() {
   return new FPRegKiller();
 }
 
+/// isFPStackVReg - Return true if the specified vreg is from a fp stack
+/// register class.
+static bool isFPStackVReg(unsigned RegNo, const MachineRegisterInfo &MRI) {
+  if (!TargetRegisterInfo::isVirtualRegister(RegNo))
+    return false;
+  
+  switch (MRI.getRegClass(RegNo)->getID()) {
+  default: return false;
+  case X86::RFP32RegClassID:
+  case X86::RFP64RegClassID:
+  case X86::RFP80RegClassID:
+  return true;
+  }
+}
+
+
 /// ContainsFPStackCode - Return true if the specific MBB has floating point
 /// stack code, and thus needs an FP_REG_KILL.
-static bool ContainsFPStackCode(MachineBasicBlock *MBB, unsigned SSELevel,
-                                MachineRegisterInfo &MRI) {
-  
+static bool ContainsFPStackCode(MachineBasicBlock *MBB,
+                                const MachineRegisterInfo &MRI) {
+  // Scan the block, looking for instructions that define or use fp stack vregs.
   for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
        I != E; ++I) {
-    if (I->getNumOperands() != 0 && I->getOperand(0).isReg()) {
-      for (unsigned op = 0, e = I->getNumOperands(); op != e; ++op) {
-        if (I->getOperand(op).isReg() && I->getOperand(op).isDef() &&
-            TargetRegisterInfo::isVirtualRegister(I->getOperand(op).getReg())) {
-          const TargetRegisterClass *RegClass =
-            MRI.getRegClass(I->getOperand(op).getReg());
-          
-          if (RegClass == X86::RFP32RegisterClass ||
-             RegClass == X86::RFP64RegisterClass ||
-             RegClass == X86::RFP80RegisterClass)
+    for (unsigned op = 0, e = I->getNumOperands(); op != e; ++op) {
+      if (!I->getOperand(op).isReg())
+        continue;
+      if (unsigned Reg = I->getOperand(op).getReg())
+        if (isFPStackVReg(Reg, MRI))
           return true;
-        }
-      }
     }
   }
   
   // Check PHI nodes in successor blocks.  These PHI's will be lowered to have
-  // a copy of the input value in this block.  In SSE mode, we only care about
-  // 80-bit values.
-  
-  // Final check, check LLVM BB's that are successors to the LLVM BB
-  // corresponding to BB for FP PHI nodes.
-  const BasicBlock *LLVMBB = MBB->getBasicBlock();
-  for (succ_const_iterator SI = succ_begin(LLVMBB), E = succ_end(LLVMBB);
-       SI != E; ++SI) {
-    const PHINode *PN;
-    for (BasicBlock::const_iterator II = SI->begin();
-         (PN = dyn_cast<PHINode>(II)); ++II) {
-      if (PN->getType()->isX86_FP80Ty() ||
-          (SSELevel == 0 && PN->getType()->isFloatingPointTy()) ||
-          (SSELevel < 2 && PN->getType()->isDoubleTy())) {
+  // a copy of the input value in this block, which is a definition of the
+  // value.
+  for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(),
+       E = MBB->succ_end(); SI != E; ++ SI) {
+    MachineBasicBlock *SuccBB = *SI;
+    for (MachineBasicBlock::iterator I = SuccBB->begin(), E = SuccBB->end();
+         I != E; ++I) {
+      // All PHI nodes are at the top of the block.
+      if (!I->isPHI()) break;
+      
+      if (isFPStackVReg(I->getOperand(0).getReg(), MRI))
         return true;
-      }
     }
   }
   
@@ -101,8 +105,8 @@ static bool ContainsFPStackCode(MachineBasicBlock *MBB, unsigned SSELevel,
 
 bool FPRegKiller::runOnMachineFunction(MachineFunction &MF) {
   // If we are emitting FP stack code, scan the basic block to determine if this
-  // block defines any FP values.  If so, put an FP_REG_KILL instruction before
-  // the terminator of the block.
+  // block defines or uses any FP values.  If so, put an FP_REG_KILL instruction
+  // before the terminator of the block.
 
   // Note that FP stack instructions are used in all modes for long double,
   // so we always need to do this check.
@@ -115,19 +119,12 @@ bool FPRegKiller::runOnMachineFunction(MachineFunction &MF) {
 
   // Fast-path: If nothing is using the x87 registers, we don't need to do
   // any scanning.
-  MachineRegisterInfo &MRI = MF.getRegInfo();
+  const MachineRegisterInfo &MRI = MF.getRegInfo();
   if (MRI.getRegClassVirtRegs(X86::RFP80RegisterClass).empty() &&
       MRI.getRegClassVirtRegs(X86::RFP64RegisterClass).empty() &&
       MRI.getRegClassVirtRegs(X86::RFP32RegisterClass).empty())
     return false;
 
-  const X86Subtarget &Subtarget = MF.getTarget().getSubtarget<X86Subtarget>();
-  unsigned SSELevel = 0;
-  if (Subtarget.hasSSE2())
-    SSELevel = 2;
-  else if (Subtarget.hasSSE1())
-    SSELevel = 1;
-  
   bool Changed = false;
   MachineFunction::iterator MBBI = MF.begin();
   MachineFunction::iterator EndMBB = MF.end();
@@ -144,7 +141,7 @@ bool FPRegKiller::runOnMachineFunction(MachineFunction &MF) {
     }
     
     // If we find any FP stack code, emit the FP_REG_KILL instruction.
-    if (ContainsFPStackCode(MBB, SSELevel, MRI)) {
+    if (ContainsFPStackCode(MBB, MRI)) {
       BuildMI(*MBB, MBBI->getFirstTerminator(), DebugLoc(),
               MF.getTarget().getInstrInfo()->get(X86::FP_REG_KILL));
       ++NumFPKill;