: BaseType(RegBase), isRIPRel(false), Scale(1), IndexReg(), Disp(0),
GV(0), CP(0), ES(0), JT(-1), Align(0) {
}
+
+ bool hasSymbolicDisplacement() const {
+ return GV != 0 || CP != 0 || ES != 0 || JT != -1;
+ }
+
void dump() {
cerr << "X86ISelAddressMode " << this << "\n";
cerr << "Base.Reg ";
bool X86DAGToDAGISel::MatchAddress(SDValue N, X86ISelAddressMode &AM,
bool isRoot, unsigned Depth) {
bool is64Bit = Subtarget->is64Bit();
- DebugLoc dl = N.getNode()->getDebugLoc();
+ DebugLoc dl = N.getDebugLoc();
DOUT << "MatchAddress: "; DEBUG(AM.dump());
// Limit recursion.
if (Depth > 5)
if (is64Bit && (TM.getCodeModel() != CodeModel::Small ||
AM.Base.Reg.getNode() || AM.IndexReg.getNode()))
break;
- if (AM.GV != 0 || AM.CP != 0 || AM.ES != 0 || AM.JT != -1)
+ if (AM.hasSymbolicDisplacement())
break;
// If value is available in a register both base and index components have
// been picked, we can't fit the result available in the register in the
// optimal (especially for code size consideration). LEA is nice because of
// its three-address nature. Tweak the cost function again when we can run
// convertToThreeAddress() at register allocation time.
- if (AM.GV || AM.CP || AM.ES || AM.JT != -1) {
+ if (AM.hasSymbolicDisplacement()) {
// For X86-64, we should always use lea to materialize RIP relative
// addresses.
if (Subtarget->is64Bit())
assert(!Subtarget->is64Bit() &&
"getTruncateTo8Bit is only needed on x86-32!");
SDValue SRIdx = CurDAG->getTargetConstant(1, MVT::i32); // SubRegSet 1
- DebugLoc dl = N0.getNode()->getDebugLoc();
+ DebugLoc dl = N0.getDebugLoc();
// Ensure that the source register has an 8-bit subreg on 32-bit targets
unsigned Opc;
SDValue N1 = Node->getOperand(1);
SDValue N2 = Node->getOperand(2);
FrameIndexSDNode *FINode = dyn_cast<FrameIndexSDNode>(N1);
- if (!FINode)
- break;
+
+ // FIXME: We need to handle this for VLAs.
+ if (!FINode) {
+ ReplaceUses(N.getValue(0), Chain);
+ return NULL;
+ }
+
if (N2.getOpcode() == ISD::ADD &&
N2.getOperand(0).getOpcode() == X86ISD::GlobalBaseReg)
N2 = N2.getOperand(1);
- if (N2.getOpcode() != X86ISD::Wrapper)
- break;
+
+ // If N2 is not Wrapper(decriptor) then the llvm.declare is mangled
+ // somehow, just ignore it.
+ if (N2.getOpcode() != X86ISD::Wrapper) {
+ ReplaceUses(N.getValue(0), Chain);
+ return NULL;
+ }
GlobalAddressSDNode *GVNode =
dyn_cast<GlobalAddressSDNode>(N2.getOperand(0));
- if (!GVNode)
- break;
+ if (GVNode == 0) {
+ ReplaceUses(N.getValue(0), Chain);
+ return NULL;
+ }
SDValue Tmp1 = CurDAG->getTargetFrameIndex(FINode->getIndex(),
TLI.getPointerTy());
SDValue Tmp2 = CurDAG->getTargetGlobalAddress(GVNode->getGlobal(),
SDValue Ops[] = { Tmp1, Tmp2, Chain };
return CurDAG->getTargetNode(TargetInstrInfo::DECLARE, dl,
MVT::Other, Ops, 3);
- break;
}
}