Fix some warnings, some of which were spurious, and some of which were real

[oota-llvm.git] / lib / Target / X86 / X86InstrBuilder.h

diff --git a/lib/Target/X86/X86InstrBuilder.h b/lib/Target/X86/X86InstrBuilder.h
index 7163c996df8157a5148f70390e96f40c2137148b..a981db069ebe015f60c4330886609cc32a298553 100644 (file)
--- a/lib/Target/X86/X86InstrBuilder.h
+++ b/lib/Target/X86/X86InstrBuilder.h
@@ -1,4 +1,11 @@
 //===-- X86InstrBuilder.h - Functions to aid building x86 insts -*- C++ -*-===//
+// 
+//                     The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// 
+//===----------------------------------------------------------------------===//
 //
 // This file exposes functions that may be used with BuildMI from the
 // MachineInstrBuilder.h file to handle X86'isms in a clean way.
@@ -19,6 +26,8 @@
 
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 
+namespace llvm {
+
 /// addDirectMem - This function is used to add a direct memory reference to the
 /// current instruction -- that is, a dereference of an address in a register,
 /// with no scale, index or displacement. An example is: DWORD PTR [EAX].
@@ -27,7 +36,7 @@ inline const MachineInstrBuilder &addDirectMem(const MachineInstrBuilder &MIB,
                                                unsigned Reg) {
   // Because memory references are always represented with four
   // values, this adds: Reg, [1, NoReg, 0] to the instruction.
-  return MIB.addReg(Reg).addZImm(1).addMReg(0).addSImm(0);
+  return MIB.addReg(Reg).addZImm(1).addReg(0).addSImm(0);
 }
 
 
@@ -37,7 +46,15 @@ inline const MachineInstrBuilder &addDirectMem(const MachineInstrBuilder &MIB,
 ///
 inline const MachineInstrBuilder &addRegOffset(const MachineInstrBuilder &MIB,
                                                unsigned Reg, int Offset) {
-  return MIB.addReg(Reg).addZImm(1).addMReg(0).addSImm(Offset);
+  return MIB.addReg(Reg).addZImm(1).addReg(0).addSImm(Offset);
+}
+
+inline const MachineInstrBuilder &addFullAddress(const MachineInstrBuilder &MIB,
+                                                 unsigned BaseReg,
+                                                 unsigned Scale,
+                                                 unsigned IndexReg,
+                                                 unsigned Disp) {
+  return MIB.addReg(BaseReg).addZImm(Scale).addReg(IndexReg).addSImm(Disp);
 }
 
 /// addFrameReference - This function is used to add a reference to the base of
@@ -47,7 +64,7 @@ inline const MachineInstrBuilder &addRegOffset(const MachineInstrBuilder &MIB,
 ///
 inline const MachineInstrBuilder &
 addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0) {
-  return MIB.addFrameIndex(FI).addZImm(1).addMReg(0).addSImm(Offset);
+  return MIB.addFrameIndex(FI).addZImm(1).addReg(0).addSImm(Offset);
 }
 
 /// addConstantPoolReference - This function is used to add a reference to the
@@ -58,8 +75,10 @@ addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0) {
 ///
 inline const MachineInstrBuilder &
 addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI,
-                        int Offset = 0) {
-  return MIB.addConstantPoolIndex(CPI).addZImm(1).addMReg(0).addSImm(Offset);
+                         int Offset = 0) {
+  return MIB.addConstantPoolIndex(CPI).addZImm(1).addReg(0).addSImm(Offset);
 }
 
+} // End llvm namespace
+
 #endif