Infrastructure for getting the machine code size of a function and an instruction...
[oota-llvm.git] / lib / Target / X86 / X86InstrFPStack.td
index 22ca7c681c78f60afdf41651275fb7b343b996a5..b07b6efddc88073a5f8ec46e6e409043dfdd7229 100644 (file)
@@ -72,45 +72,45 @@ def fpimmneg1 : PatLeaf<(fpimm), [{
 let usesCustomDAGSchedInserter = 1 in {  // Expanded by the scheduler.
   def FP32_TO_INT16_IN_MEM : I<0, Pseudo,
                               (outs), (ins i16mem:$dst, RFP32:$src),
-                              "#FP32_TO_INT16_IN_MEM PSEUDO!",
+                              "##FP32_TO_INT16_IN_MEM PSEUDO!",
                               [(X86fp_to_i16mem RFP32:$src, addr:$dst)]>;
   def FP32_TO_INT32_IN_MEM : I<0, Pseudo,
                               (outs), (ins i32mem:$dst, RFP32:$src),
-                              "#FP32_TO_INT32_IN_MEM PSEUDO!",
+                              "##FP32_TO_INT32_IN_MEM PSEUDO!",
                               [(X86fp_to_i32mem RFP32:$src, addr:$dst)]>;
   def FP32_TO_INT64_IN_MEM : I<0, Pseudo,
                               (outs), (ins i64mem:$dst, RFP32:$src),
-                              "#FP32_TO_INT64_IN_MEM PSEUDO!",
+                              "##FP32_TO_INT64_IN_MEM PSEUDO!",
                               [(X86fp_to_i64mem RFP32:$src, addr:$dst)]>;
   def FP64_TO_INT16_IN_MEM : I<0, Pseudo,
                               (outs), (ins i16mem:$dst, RFP64:$src),
-                              "#FP64_TO_INT16_IN_MEM PSEUDO!",
+                              "##FP64_TO_INT16_IN_MEM PSEUDO!",
                               [(X86fp_to_i16mem RFP64:$src, addr:$dst)]>;
   def FP64_TO_INT32_IN_MEM : I<0, Pseudo,
                               (outs), (ins i32mem:$dst, RFP64:$src),
-                              "#FP64_TO_INT32_IN_MEM PSEUDO!",
+                              "##FP64_TO_INT32_IN_MEM PSEUDO!",
                               [(X86fp_to_i32mem RFP64:$src, addr:$dst)]>;
   def FP64_TO_INT64_IN_MEM : I<0, Pseudo,
                               (outs), (ins i64mem:$dst, RFP64:$src),
-                              "#FP64_TO_INT64_IN_MEM PSEUDO!",
+                              "##FP64_TO_INT64_IN_MEM PSEUDO!",
                               [(X86fp_to_i64mem RFP64:$src, addr:$dst)]>;
   def FP80_TO_INT16_IN_MEM : I<0, Pseudo,
                               (outs), (ins i16mem:$dst, RFP80:$src),
-                              "#FP80_TO_INT16_IN_MEM PSEUDO!",
+                              "##FP80_TO_INT16_IN_MEM PSEUDO!",
                               [(X86fp_to_i16mem RFP80:$src, addr:$dst)]>;
   def FP80_TO_INT32_IN_MEM : I<0, Pseudo,
                               (outs), (ins i32mem:$dst, RFP80:$src),
-                              "#FP80_TO_INT32_IN_MEM PSEUDO!",
+                              "##FP80_TO_INT32_IN_MEM PSEUDO!",
                               [(X86fp_to_i32mem RFP80:$src, addr:$dst)]>;
   def FP80_TO_INT64_IN_MEM : I<0, Pseudo,
                               (outs), (ins i64mem:$dst, RFP80:$src),
-                              "#FP80_TO_INT64_IN_MEM PSEUDO!",
+                              "##FP80_TO_INT64_IN_MEM PSEUDO!",
                               [(X86fp_to_i64mem RFP80:$src, addr:$dst)]>;
 }
 
 let isTerminator = 1 in
   let Defs = [FP0, FP1, FP2, FP3, FP4, FP5, FP6] in
-    def FP_REG_KILL  : I<0, Pseudo, (outs), (ins), "#FP_REG_KILL", []>;
+    def FP_REG_KILL  : I<0, Pseudo, (outs), (ins), "##FP_REG_KILL", []>;
 
 // All FP Stack operations are represented with four instructions here.  The
 // first three instructions, generated by the instruction selector, use "RFP32"