#errror "Must define I macro before including X86/X86InstructionInfo.def!"
#endif
+// Macro to handle the implicit register uses lists...
+#ifndef IMPREGSLIST
+#define IMPREGSLIST(NAME, ...)
+#endif
+
+// Implicit register usage info: O_ is for one register, T_ is for two registers
+// NoIR means the instruction does not use implicit registers, in this form.
+#define NoIR 0
+IMPREGSLIST(O_AL , X86::AL , 0)
+IMPREGSLIST(O_AH , X86::AH , 0)
+IMPREGSLIST(O_CL , X86::CL , 0)
+IMPREGSLIST(O_AX , X86::AX , 0)
+IMPREGSLIST(O_DX , X86::DX , 0)
+IMPREGSLIST(O_EAX, X86::EAX, 0)
+IMPREGSLIST(O_EDX, X86::EDX, 0)
+IMPREGSLIST(O_EBP, X86::EBP, 0)
+IMPREGSLIST(T_AXDX , X86::AX , X86::DX , 0)
+IMPREGSLIST(T_EAXEDX, X86::EAX, X86::EDX, 0)
+IMPREGSLIST(C_CLOBBER, X86::EAX, X86::ECX, X86::EDX,
+ X86::FP0, X86::FP1, X86::FP2, X86::FP3,
+ X86::FP4, X86::FP5, X86::FP6, 0) // Callee clobber regs
+
+// Floating point registers...
+IMPREGSLIST(O_ST0, X86::ST0, 0)
+//IMPREGSLIST(O_TOP, X86::TOP, 0)
+
+#undef IMPREGSLIST
+
+
// Arguments to be passed into the I macro
// #1: Enum name - This ends up being the opcode symbol in the X86 namespace
-// #2: Opcode name, as used by the gnu assembler
-// #3: Instruction Flags - This should be a field or'd together that contains
-// constants from the MachineInstrInfo.h file.
-// #4: Target Specific Flags - Another bitfield containing X86 specific flags
+// #2: Opcode name, as used by the Intel assembler. This should be in
+// ALL CAPS for pseudo-instructions (which the assembler should never
+// see), or all lowercase for real instructions (which the assembler
+// should see).
+// #3: The base opcode for the instruction
+// #4: Instruction Flags - This should be a field or'd together that contains
+// constants from the TargetInstrInfo.h file.
+// #5: Target Specific Flags - Another bitfield containing X86 specific flags
// that we are interested in for each instruction. These should be flags
// defined in X86InstrInfo.h in the X86II namespace.
+// #6: Name of the implicit register uses list
+// #7: Name of the implicit register definitions list
+//
+
+// The first instruction must always be the PHI instruction:
+I(PHI , "PHI", 0, 0, X86II::Pseudo , NoIR, NoIR)
+
+// The second instruction must always be the noop instruction:
+I(NOOP , "nop", 0x90, 0, X86II::RawFrm | X86II::Void, NoIR, NoIR) // nop
+
+// This "instruction" is really an annotation which indicates that a specified
+// amount of stack space is needed for an outgoing function call. This
+// instruction is found before any of the stores to the argument slots, which
+// use direct ESP references. If the frame pointer is eliminated, this
+// instruction turns into a noop, but if the frame pointer is retained, this
+// turns into a 'sub ESP, <amount>'.
//
+I(ADJCALLSTACKDOWN, "ADJCALLSTACKDOWN", 0, 0, X86II::Pseudo, NoIR, NoIR)
-// The first instruction must always be the PHI instruction: (FIXME, not yet)
-I(PHI , "phi", 0, 0)
+// This instruction is used to mark readjustment of the stack after a function
+// call. If the frame pointer is retained, this becomes a 'add ESP, <amount>'
+// instruction after the call.
+I(ADJCALLSTACKUP , "ADJCALLSTACKUP" , 0, 0, X86II::Pseudo, NoIR, NoIR)
+
+// This pseudo-instruction is used to record implicit uses of physical registers
+// at the end of the function. This ensures that bad things aren't done to
+// registes that are live on exit from the function (for example, EAX).
+//
+I(IMPLICIT_USE, "IMPLICIT_USE", 0, 0, X86II::Pseudo, NoIR, NoIR)
-// The second instruction must always be the noop instruction: (FIXME, not yet)
-I(NOOP , "nop", 0, X86II::Void) // nop 90
// Flow control instructions
-I(RET , "ret", M_RET_FLAG, X86II::Void) // ret CB
-I(JMP , "jmp", M_BRANCH_FLAG, X86II::Void) // jmp foo EB|E9 cb|w
+I(RET , "ret", 0xC3, M_RET_FLAG | M_TERMINATOR_FLAG, X86II::RawFrm | X86II::Void, NoIR, NoIR) // ret
+
+I(JMP , "jmp", 0xE9, M_BRANCH_FLAG | M_TERMINATOR_FLAG, X86II::RawFrm | X86II::Void, NoIR, NoIR) // jmp foo
+I(JB , "jb" , 0x82, M_BRANCH_FLAG | M_TERMINATOR_FLAG, X86II::RawFrm | X86II::TB | X86II::Void, NoIR, NoIR) // jne foo
+I(JAE , "jae", 0x83, M_BRANCH_FLAG | M_TERMINATOR_FLAG, X86II::RawFrm | X86II::TB | X86II::Void, NoIR, NoIR) // jne foo
+I(JE , "je", 0x84, M_BRANCH_FLAG | M_TERMINATOR_FLAG, X86II::RawFrm | X86II::TB | X86II::Void, NoIR, NoIR) // je foo
+I(JNE , "jne", 0x85, M_BRANCH_FLAG | M_TERMINATOR_FLAG, X86II::RawFrm | X86II::TB | X86II::Void, NoIR, NoIR) // jne foo
+I(JBE , "jbe", 0x86, M_BRANCH_FLAG | M_TERMINATOR_FLAG, X86II::RawFrm | X86II::TB | X86II::Void, NoIR, NoIR) // jne foo
+I(JA , "ja" , 0x87, M_BRANCH_FLAG | M_TERMINATOR_FLAG, X86II::RawFrm | X86II::TB | X86II::Void, NoIR, NoIR) // jne foo
+I(JL , "jl" , 0x8C, M_BRANCH_FLAG | M_TERMINATOR_FLAG, X86II::RawFrm | X86II::TB | X86II::Void, NoIR, NoIR) // jne foo
+I(JGE , "jge", 0x8D, M_BRANCH_FLAG | M_TERMINATOR_FLAG, X86II::RawFrm | X86II::TB | X86II::Void, NoIR, NoIR) // jne foo
+I(JLE , "jle", 0x8E, M_BRANCH_FLAG | M_TERMINATOR_FLAG, X86II::RawFrm | X86II::TB | X86II::Void, NoIR, NoIR) // jne foo
+I(JG , "jg" , 0x8F, M_BRANCH_FLAG | M_TERMINATOR_FLAG, X86II::RawFrm | X86II::TB | X86II::Void, NoIR, NoIR) // jne foo
+
+I(CALLpcrel32 , "call", 0xE8, M_CALL_FLAG, X86II::Void | X86II::RawFrm, NoIR, C_CLOBBER) // call pc+42
+I(CALLr32 , "call", 0xFF, M_CALL_FLAG, X86II::Void | X86II::MRMS2r | X86II::Arg32,
+ NoIR, C_CLOBBER) // call [r32]
+I(CALLm32 , "call", 0xFF, M_CALL_FLAG, X86II::Void | X86II::MRMS2m | X86II::Arg32,
+ NoIR, C_CLOBBER) // call [m32]
+
+// Misc instructions
+I(LEAVE , "leave", 0xC9, 0, X86II::RawFrm , O_EBP, O_EBP) // leave
+I(BSWAPr32 , "bswap", 0xC8, M_2_ADDR_FLAG, X86II::AddRegFrm | X86II::Arg32 | X86II::TB , NoIR, NoIR) // R32 = bswap R32
+I(XCHGrr8 , "xchg" , 0x86, 0, X86II::MRMDestReg | X86II::Arg8 , NoIR, NoIR) // xchg(R8, R8)
+I(XCHGrr16 , "xchg" , 0x87, 0, X86II::MRMDestReg | X86II::Arg16 | X86II::OpSize, NoIR, NoIR) // xchg(R16, R16)
+I(XCHGrr32 , "xchg" , 0x87, 0, X86II::MRMDestReg | X86II::Arg32 , NoIR, NoIR) // xchg(R32, R32)
+I(LEAr16 , "lea" , 0x8D, 0, X86II::MRMSrcMem | X86II::Arg16 | X86II::OpSize, NoIR, NoIR) // R16 = lea [mem]
+I(LEAr32 , "lea" , 0x8D, 0, X86II::MRMSrcMem | X86II::Arg32 , NoIR, NoIR) // R32 = lea [mem]
+
// Move instructions
-I(MOVrr8 , "movb", 0, 0) // R8 = R8 88/r
-I(MOVrr16 , "movw", 0, 0) // R16 = R16 89/r
-I(MOVrr32 , "movl", 0, 0) // R32 = R32 89/r
-I(MOVir8 , "movb", 0, 0) // R8 = imm8 B0+ rb
-I(MOVir16 , "movw", 0, 0) // R16 = imm16 B8+ rw
-I(MOVir32 , "movl", 0, 0) // R32 = imm32 B8+ rd
+I(MOVrr8 , "mov", 0x88, 0, X86II::MRMDestReg, NoIR, NoIR) // R8 = R8
+I(MOVrr16 , "mov", 0x89, 0, X86II::MRMDestReg | X86II::OpSize, NoIR, NoIR) // R16 = R16
+I(MOVrr32 , "mov", 0x89, 0, X86II::MRMDestReg, NoIR, NoIR) // R32 = R32
+I(MOVir8 , "mov", 0xB0, 0, X86II::AddRegFrm | X86II::Arg8, NoIR, NoIR) // R8 = imm8
+I(MOVir16 , "mov", 0xB8, 0, X86II::AddRegFrm | X86II::Arg16 | X86II::OpSize, NoIR, NoIR) // R16 = imm16
+I(MOVir32 , "mov", 0xB8, 0, X86II::AddRegFrm | X86II::Arg32, NoIR, NoIR) // R32 = imm32
+I(MOVim8 , "mov", 0xC6, 0, X86II::MRMS0m | X86II::Arg8, NoIR, NoIR) // [mem] = imm8
+I(MOVim16 , "mov", 0xC7, 0, X86II::MRMS0m | X86II::Arg16 | X86II::OpSize, NoIR, NoIR) // [mem] = imm16
+I(MOVim32 , "mov", 0xC7, 0, X86II::MRMS0m | X86II::Arg32, NoIR, NoIR) // [mem] = imm32
+
+I(MOVmr8 , "mov", 0x8A, 0, X86II::MRMSrcMem | X86II::Arg8, NoIR, NoIR) // R8 = [mem]
+I(MOVmr16 , "mov", 0x8B, 0, X86II::MRMSrcMem | X86II::OpSize |
+ X86II::Arg16, NoIR, NoIR) // R16 = [mem]
+I(MOVmr32 , "mov", 0x8B, 0, X86II::MRMSrcMem | X86II::Arg32, NoIR, NoIR)// R32 = [mem]
+I(MOVrm8 , "mov", 0x88, 0, X86II::MRMDestMem | X86II::Void |
+ X86II::Arg8, NoIR, NoIR) // [mem] = R8
+I(MOVrm16 , "mov", 0x89, 0, X86II::MRMDestMem | X86II::Void |
+ X86II::OpSize | X86II::Arg16, NoIR, NoIR) // [mem] = R16
+I(MOVrm32 , "mov", 0x89, 0, X86II::MRMDestMem | X86II::Void |
+ X86II::Arg32, NoIR, NoIR) // [mem] = R32
// Arithmetic instructions
-I(ADDrr8 , "addb", 0, 0) // R8 += R8 00/r
-I(ADDrr16 , "addw", 0, 0) // R16 += R16 01/r
-I(ADDrr32 , "addl", 0, 0) // R32 += R32 01/r
-I(SUBrr8 , "subb", 0, 0) // R8 -= R8 2A/r
-I(SUBrr16 , "subw", 0, 0) // R16 -= R16 2B/r
-I(SUBrr32 , "subl", 0, 0) // R32 -= R32 2B/r
-I(MULrr8 , "mulb", 0, 0) // AX = AL*R8 F6/4
-I(MULrr16 , "mulw", 0, 0) // DX:AX= AX*R16 F7/4
-I(MULrr32 , "mull", 0, 0) // ED:EA= EA*R32 F7/4
+I(ADDrr8 , "add", 0x00, M_2_ADDR_FLAG, X86II::MRMDestReg, NoIR, NoIR) // R8 += R8
+I(ADDrr16 , "add", 0x01, M_2_ADDR_FLAG, X86II::MRMDestReg | X86II::OpSize, NoIR, NoIR) // R16 += R16
+I(ADDrr32 , "add", 0x01, M_2_ADDR_FLAG, X86II::MRMDestReg | X86II::Arg32, NoIR, NoIR) // R32 += R32
+
+I(ADDri8 , "add", 0x80, M_2_ADDR_FLAG, X86II::MRMS0r | X86II::Arg8, NoIR, NoIR) // R8 += imm8
+I(ADDri16 , "add", 0x81, M_2_ADDR_FLAG, X86II::MRMS0r | X86II::OpSize | X86II::Arg16, NoIR, NoIR) // R16 += imm16
+I(ADDri32 , "add", 0x81, M_2_ADDR_FLAG, X86II::MRMS0r | X86II::Arg32, NoIR, NoIR) // R32 += imm32
+
+I(ADCrr32 , "adc", 0x11, M_2_ADDR_FLAG, X86II::MRMDestReg | X86II::Arg32, NoIR, NoIR) // R32 += R32 + Carry
+
+I(SUBrr8 , "sub", 0x28, M_2_ADDR_FLAG, X86II::MRMDestReg, NoIR, NoIR) // R8 -= R8
+I(SUBrr16 , "sub", 0x29, M_2_ADDR_FLAG, X86II::MRMDestReg | X86II::OpSize, NoIR, NoIR) // R16 -= R16
+I(SUBrr32 , "sub", 0x29, M_2_ADDR_FLAG, X86II::MRMDestReg, NoIR, NoIR) // R32 -= R32
+
+I(SUBri8 , "sub", 0x80, M_2_ADDR_FLAG, X86II::MRMS5r | X86II::Arg8 , NoIR, NoIR) // R8 -= imm8
+I(SUBri16 , "sub", 0x81, M_2_ADDR_FLAG, X86II::MRMS5r | X86II::OpSize | X86II::Arg16, NoIR, NoIR) // R16 -= imm16
+I(SUBri32 , "sub", 0x81, M_2_ADDR_FLAG, X86II::MRMS5r | X86II::Arg32, NoIR, NoIR) // R32 -= imm32
+
+I(SBBrr32 , "sbb", 0x19, M_2_ADDR_FLAG, X86II::MRMDestReg | X86II::Arg32, NoIR, NoIR) // R32 -= R32 + Carry
+
+
+I(MULr8 , "mul", 0xF6, 0, X86II::MRMS4r | X86II::Void, O_AL, O_AX) // AX = AL*R8
+I(MULr16 , "mul", 0xF7, 0, X86II::MRMS4r | X86II::Void | // DX:AX= AX*R16
+ X86II::OpSize, O_AX, T_AXDX)
+I(MULr32 , "mul", 0xF7, 0, X86II::MRMS4r | X86II::Void, O_EAX, T_EAXEDX) // ED:EA= EA*R32
+
+I(IMULr16 , "imul", 0xAF, M_2_ADDR_FLAG, X86II::MRMSrcReg | X86II::TB | // R16 *= R16
+ X86II::OpSize, NoIR, NoIR)
+I(IMULr32 , "imul", 0xAF, M_2_ADDR_FLAG, X86II::MRMSrcReg | X86II::TB, NoIR, NoIR) // R32 *= R32
// unsigned division/remainder
-I(DIVrr8 , "divb", 0, 0) // AX/r8= AL&AH F6/6
-I(DIVrr16 , "divw", 0, 0) // DA/r16=AX&DX F7/6
-I(DIVrr32 , "divl", 0, 0) // DA/r32=EAX&DX F7/6
+I(DIVr8 , "div", 0xF6, 0, X86II::MRMS6r | X86II::Void, O_AX, O_AX) // AX/r8= AL&AH
+I(DIVr16 , "div", 0xF7, 0, X86II::MRMS6r | X86II::Void | // ED:EA/r16=AX&DX
+ X86II::OpSize, T_AXDX, T_AXDX)
+I(DIVr32 , "div", 0xF7, 0, X86II::MRMS6r | X86II::Void, T_EAXEDX,T_EAXEDX)// ED:EA/r32=EA&ED
// signed division/remainder
-I(IDIVrr8 , "idivb", 0, 0) // AX/r8= AL&AH F6/6
-I(IDIVrr16 , "idivw", 0, 0) // DA/r16=AX&DX F7/6
-I(IDIVrr32 , "idivl", 0, 0) // DA/r32=EAX&DX F7/6
+I(IDIVr8 , "idiv", 0xF6, 0, X86II::MRMS7r | X86II::Void, O_AX, O_AX) // AX/r8= AL&AH
+I(IDIVr16 , "idiv", 0xF7, 0, X86II::MRMS7r | X86II::Void | // DA/r16=AX&DX
+ X86II::OpSize, T_AXDX, T_AXDX)
+I(IDIVr32 , "idiv", 0xF7, 0, X86II::MRMS7r | X86II::Void, T_EAXEDX,T_EAXEDX)// DA/r32=EAX&DX
// Logical operators
-I(ANDrr8 , "andb", 0, 0) // R8 &= R8 20/r
-I(ANDrr16 , "andw", 0, 0) // R16 &= R16 21/r
-I(ANDrr32 , "andl", 0, 0) // R32 &= R32 21/r
-I(ORrr8 , "orb", 0, 0) // R8 |= R8 08/r
-I(ORrr16 , "orw", 0, 0) // R16 |= R16 09/r
-I(ORrr32 , "orl", 0, 0) // R32 |= R32 09/r
-I(XORrr8 , "xorb", 0, 0) // R8 ^= R8 30/r
-I(XORrr16 , "xorw", 0, 0) // R16 ^= R16 31/r
-I(XORrr32 , "xorl", 0, 0) // R32 ^= R32 31/r
+I(ANDrr8 , "and", 0x20, M_2_ADDR_FLAG, X86II::MRMDestReg, NoIR, NoIR) // R8 &= R8
+I(ANDrr16 , "and", 0x21, M_2_ADDR_FLAG, X86II::MRMDestReg | X86II::OpSize, NoIR, NoIR) // R16 &= R16
+I(ANDrr32 , "and", 0x21, M_2_ADDR_FLAG, X86II::MRMDestReg, NoIR, NoIR) // R32 &= R32
+I(ANDri8 , "and", 0x80, M_2_ADDR_FLAG, X86II::MRMS4r | X86II::Arg8 , NoIR, NoIR) // R8 &= imm8
+I(ANDri16 , "and", 0x81, M_2_ADDR_FLAG, X86II::MRMS4r | X86II::Arg16 | X86II::OpSize, NoIR, NoIR) // R16 &= imm16
+I(ANDri32 , "and", 0x81, M_2_ADDR_FLAG, X86II::MRMS4r | X86II::Arg32, NoIR, NoIR) // R32 &= imm32
+
+
+I(ORrr8 , "or", 0x08, M_2_ADDR_FLAG, X86II::MRMDestReg, NoIR, NoIR) // R8 |= R8
+I(ORrr16 , "or", 0x09, M_2_ADDR_FLAG, X86II::MRMDestReg | X86II::OpSize, NoIR, NoIR) // R16 |= R16
+I(ORrr32 , "or", 0x09, M_2_ADDR_FLAG, X86II::MRMDestReg, NoIR, NoIR) // R32 |= R32
+I(ORri8 , "or", 0x80, M_2_ADDR_FLAG, X86II::MRMS1r | X86II::Arg8 , NoIR, NoIR) // R8 |= imm8
+I(ORri16 , "or", 0x81, M_2_ADDR_FLAG, X86II::MRMS1r | X86II::Arg16 | X86II::OpSize, NoIR, NoIR) // R16 |= imm16
+I(ORri32 , "or", 0x81, M_2_ADDR_FLAG, X86II::MRMS1r | X86II::Arg32, NoIR, NoIR) // R32 |= imm32
+
+I(XORrr8 , "xor", 0x30, M_2_ADDR_FLAG, X86II::MRMDestReg, NoIR, NoIR) // R8 ^= R8
+I(XORrr16 , "xor", 0x31, M_2_ADDR_FLAG, X86II::MRMDestReg | X86II::OpSize, NoIR, NoIR) // R16 ^= R16
+I(XORrr32 , "xor", 0x31, M_2_ADDR_FLAG, X86II::MRMDestReg, NoIR, NoIR) // R32 ^= R32
+I(XORri8 , "xor", 0x80, M_2_ADDR_FLAG, X86II::MRMS6r | X86II::Arg8 , NoIR, NoIR) // R8 ^= imm8
+I(XORri16 , "xor", 0x81, M_2_ADDR_FLAG, X86II::MRMS6r | X86II::Arg16 | X86II::OpSize, NoIR, NoIR) // R16 ^= imm16
+I(XORri32 , "xor", 0x81, M_2_ADDR_FLAG, X86II::MRMS6r | X86II::Arg32, NoIR, NoIR) // R32 ^= imm32
+
+// test instructions are just like and, except they don't generate a result (but
+// they do set flags).
+I(TESTri8 , "test", 0xF6, 0, X86II::MRMS0r | X86II::Arg8, NoIR, NoIR) // flags = R8 & imm8
+I(TESTri16 , "test", 0xF7, 0, X86II::MRMS0r | X86II::Arg16 | X86II::OpSize, NoIR, NoIR) // flags = R16 & imm16
+I(TESTri32 , "test", 0xF7, 0, X86II::MRMS0r | X86II::Arg32, NoIR, NoIR) // flags = R32 & imm32
+
+I(TESTrr8 , "test", 0x84, 0, X86II::MRMDestReg | X86II::Arg8, NoIR, NoIR) // flags = R8 & R8
+I(TESTrr16 , "test", 0x85, 0, X86II::MRMDestReg | X86II::Arg16 | X86II::OpSize, NoIR, NoIR) // flags = R16 & R16
+I(TESTrr32 , "test", 0x85, 0, X86II::MRMDestReg | X86II::Arg32, NoIR, NoIR) // flags = R32 & R32
+
// Shift instructions
-I(SHLrr8 , "shlb", 0, 0) // R8 <<= cl D2/4
-I(SHLir8 , "shlb", 0, 0) // R8 <<= imm8 C0/4 ib
-I(SHLrr16 , "shlw", 0, 0) // R16 <<= cl D3/4
-I(SHLir16 , "shlw", 0, 0) // R16 <<= imm8 C1/4 ib
-I(SHLrr32 , "shll", 0, 0) // R32 <<= cl D3/4
-I(SHLir32 , "shll", 0, 0) // R32 <<= imm8 C1/4 ib
-I(SHRrr8 , "shrb", 0, 0) // R8 >>>= cl D2/5
-I(SHRir8 , "shrb", 0, 0) // R8 >>>= imm8 C0/5 ib
-I(SHRrr16 , "shrw", 0, 0) // R16 >>>= cl D3/5
-I(SHRir16 , "shrw", 0, 0) // R16 >>>= imm8 C1/5 ib
-I(SHRrr32 , "shrl", 0, 0) // R32 >>>= cl D3/5
-I(SHRir32 , "shrl", 0, 0) // R32 >>>= imm8 C1/5 ib
-I(SARrr8 , "sarb", 0, 0) // R8 >>= cl D2/7
-I(SARir8 , "sarb", 0, 0) // R8 >>= imm8 C0/7 ib
-I(SARrr16 , "sarw", 0, 0) // R16 >>= cl D3/7
-I(SARir16 , "sarw", 0, 0) // R16 >>= imm8 C1/7 ib
-I(SARrr32 , "sarl", 0, 0) // R32 >>= cl D3/7
-I(SARir32 , "sarl", 0, 0) // R32 >>= imm8 C1/7 ib
-
-// Floating point loads
-I(FLDr4 , "flds", 0, 0) // push float D9/0
-I(FLDr8 , "fldl ", 0, 0) // push double DD/0
+I(SHLrr8 , "shl", 0xD2, M_2_ADDR_FLAG, X86II::MRMS4r | X86II::PrintImplUses, O_CL, NoIR) // R8 <<= cl
+I(SHLrr16 , "shl", 0xD3, M_2_ADDR_FLAG, X86II::MRMS4r | X86II::OpSize | X86II::PrintImplUses, O_CL, NoIR) // R16 <<= cl
+I(SHLrr32 , "shl", 0xD3, M_2_ADDR_FLAG, X86II::MRMS4r | X86II::PrintImplUses, O_CL, NoIR) // R32 <<= cl
+I(SHLir8 , "shl", 0xC0, M_2_ADDR_FLAG, X86II::MRMS4r | X86II::Arg8, NoIR, NoIR) // R8 <<= imm8
+I(SHLir16 , "shl", 0xC1, M_2_ADDR_FLAG, X86II::MRMS4r | X86II::Arg8 | X86II::OpSize, NoIR, NoIR) // R16 <<= imm8
+I(SHLir32 , "shl", 0xC1, M_2_ADDR_FLAG, X86II::MRMS4r | X86II::Arg8, NoIR, NoIR) // R32 <<= imm8
+I(SHRrr8 , "shr", 0xD2, M_2_ADDR_FLAG, X86II::MRMS5r | X86II::PrintImplUses, O_CL, NoIR) // R8 >>>= cl
+I(SHRrr16 , "shr", 0xD3, M_2_ADDR_FLAG, X86II::MRMS5r | X86II::OpSize | X86II::PrintImplUses, O_CL, NoIR) // R16 >>>= cl
+I(SHRrr32 , "shr", 0xD3, M_2_ADDR_FLAG, X86II::MRMS5r | X86II::PrintImplUses, O_CL, NoIR) // R32 >>>= cl
+I(SHRir8 , "shr", 0xC0, M_2_ADDR_FLAG, X86II::MRMS5r | X86II::Arg8, NoIR, NoIR) // R8 >>>= imm8
+I(SHRir16 , "shr", 0xC1, M_2_ADDR_FLAG, X86II::MRMS5r | X86II::Arg8 | X86II::OpSize, NoIR, NoIR) // R16 >>>= imm8
+I(SHRir32 , "shr", 0xC1, M_2_ADDR_FLAG, X86II::MRMS5r | X86II::Arg8, NoIR, NoIR) // R32 >>>= imm8
+I(SARrr8 , "sar", 0xD2, M_2_ADDR_FLAG, X86II::MRMS7r | X86II::PrintImplUses, O_CL, NoIR) // R8 >>= cl
+I(SARrr16 , "sar", 0xD3, M_2_ADDR_FLAG, X86II::MRMS7r | X86II::OpSize | X86II::PrintImplUses, O_CL, NoIR) // R16 >>= cl
+I(SARrr32 , "sar", 0xD3, M_2_ADDR_FLAG, X86II::MRMS7r | X86II::PrintImplUses, O_CL, NoIR) // R32 >>= cl
+I(SARir8 , "sar", 0xC0, M_2_ADDR_FLAG, X86II::MRMS7r | X86II::Arg8, NoIR, NoIR) // R8 >>= imm8
+I(SARir16 , "sar", 0xC1, M_2_ADDR_FLAG, X86II::MRMS7r | X86II::Arg8 | X86II::OpSize, NoIR, NoIR) // R16 >>= imm8
+I(SARir32 , "sar", 0xC1, M_2_ADDR_FLAG, X86II::MRMS7r | X86II::Arg8, NoIR, NoIR) // R32 >>= imm8
-// Floating point compares
-I(FUCOMPP , "fucompp", 0, 0) // compare+pop2x DA E9
+I(SHLDir32 , "shld", 0xA4, M_2_ADDR_FLAG, X86II::MRMDestReg | X86II::TB | X86II::Arg8, NoIR, NoIR) // R32 <<= R32,R32 imm8
+I(SHLDrr32 , "shld", 0xA5, M_2_ADDR_FLAG, X86II::MRMDestReg | X86II::TB | X86II::PrintImplUses, O_CL, NoIR) // R32 <<= R32,R32 cl
+I(SHRDir32 , "shrd", 0xAC, M_2_ADDR_FLAG, X86II::MRMDestReg | X86II::TB | X86II::Arg8, NoIR, NoIR) // R32 >>= R32,R32 imm8
+I(SHRDrr32 , "shrd", 0xAD, M_2_ADDR_FLAG, X86II::MRMDestReg | X86II::TB | X86II::PrintImplUses, O_CL, NoIR) // R32 >>= R32,R32 cl
-// Floating point flag ops
-I(FNSTSWr8 , "fnstsw", 0, 0) // AX = fp flags DF E0
// Condition code ops, incl. set if equal/not equal/...
-I(SAHF , "sahf", 0, 0) // flags = AH 9E
-I(SETA , "seta", 0, 0) // R8 = > unsign 0F 97
-I(SETAE , "setae", 0, 0) // R8 = >=unsign 0F 93
-I(SETB , "setb", 0, 0) // R8 = < unsign 0F 92
-I(SETBE , "setbe", 0, 0) // R8 = <=unsign 0F 96
-I(SETE , "sete", 0, 0) // R8 = == 0F 94
-I(SETG , "setg", 0, 0) // R8 = > signed 0F 9F
-I(SETGE , "setge", 0, 0) // R8 = >=signed 0F 9D
-I(SETL , "setl", 0, 0) // R8 = < signed 0F 9C
-I(SETLE , "setle", 0, 0) // R8 = <=signed 0F 9E
-I(SETNE , "setne", 0, 0) // R8 = != 0F 95
+I(SAHF , "sahf", 0x9E, 0, X86II::RawFrm, O_AH, NoIR) // flags = AH
+I(SETBr , "setb", 0x92, 0, X86II::TB | X86II::MRMS0r, NoIR, NoIR) // R8 = < unsign
+I(SETAEr , "setae", 0x93, 0, X86II::TB | X86II::MRMS0r, NoIR, NoIR) // R8 = >= unsign
+I(SETEr , "sete", 0x94, 0, X86II::TB | X86II::MRMS0r, NoIR, NoIR) // R8 = ==
+I(SETNEr , "setne", 0x95, 0, X86II::TB | X86II::MRMS0r, NoIR, NoIR) // R8 = !=
+I(SETBEr , "setbe", 0x96, 0, X86II::TB | X86II::MRMS0r, NoIR, NoIR) // R8 = <= unsign
+I(SETAr , "seta", 0x97, 0, X86II::TB | X86II::MRMS0r, NoIR, NoIR) // R8 = > unsign
+I(SETLr , "setl", 0x9C, 0, X86II::TB | X86II::MRMS0r, NoIR, NoIR) // R8 = < signed
+I(SETGEr , "setge", 0x9D, 0, X86II::TB | X86II::MRMS0r, NoIR, NoIR) // R8 = >= signed
+I(SETLEr , "setle", 0x9E, 0, X86II::TB | X86II::MRMS0r, NoIR, NoIR) // R8 = <= signed
+I(SETGr , "setg", 0x9F, 0, X86II::TB | X86II::MRMS0r, NoIR, NoIR) // R8 = > signed
+
+// Conditional moves. These are modelled as X = cmovXX Y, Z. Eventually
+// register allocated to cmovXX XY, Z
+I(CMOVErr16 , "cmove", 0x44, M_2_ADDR_FLAG, X86II::TB | X86II::OpSize | X86II::MRMSrcReg, NoIR, NoIR) // if ==, R16 = R16
+I(CMOVNErr32 , "cmovne", 0x45, M_2_ADDR_FLAG, X86II::TB | X86II::MRMSrcReg, NoIR, NoIR) // if !=, R32 = R32
+
// Integer comparisons
-I(CMPrr8 , "cmpb", 0, 0) // compare R8,R8 38/r
-I(CMPrr16 , "cmpw", 0, 0) // compare R16,R16 39/r
-I(CMPrr32 , "cmpl", 0, 0) // compare R32,R32 39/r
+I(CMPrr8 , "cmp", 0x38, 0, X86II::Void | X86II::MRMDestReg , NoIR, NoIR) // compare R8,R8
+I(CMPrr16 , "cmp", 0x39, 0, X86II::Void | X86II::MRMDestReg | X86II::OpSize, NoIR, NoIR) // compare R16,R16
+I(CMPrr32 , "cmp", 0x39, 0, X86II::Void | X86II::MRMDestReg , NoIR, NoIR) // compare R32,R32
+I(CMPri8 , "cmp", 0x80, 0, X86II::Void | X86II::MRMS7r | X86II::Arg8 , NoIR, NoIR) // compare R8, imm8
+I(CMPri16 , "cmp", 0x81, 0, X86II::Void | X86II::MRMS7r | X86II::Arg16 | X86II::OpSize, NoIR, NoIR) // compare R16, imm16
+I(CMPri32 , "cmp", 0x81, 0, X86II::Void | X86II::MRMS7r | X86II::Arg32 , NoIR, NoIR) // compare R32, imm32
+
+// Sign extenders (first 3 are good for DIV/IDIV; the others are more general)
+I(CBW , "cbw", 0x98, 0, X86II::Void | X86II::RawFrm | X86II::OpSize, O_AL, O_AH) // AX = signext(AL)
+I(CWD , "cwd", 0x99, 0, X86II::Void | X86II::RawFrm, O_AX, O_DX) // DX:AX = signext(AX)
+I(CDQ , "cdq", 0x99, 0, X86II::Void | X86II::RawFrm, O_EAX, O_EDX) // EDX:EAX = signext(EAX)
+I(MOVSXr16r8 , "movsx", 0xBE, 0, X86II::MRMSrcReg | X86II::TB | // R16 = signext(R8)
+ X86II::OpSize, NoIR, NoIR)
+I(MOVSXr32r8 , "movsx", 0xBE, 0, X86II::MRMSrcReg | X86II::TB, NoIR, NoIR) // R32 = signext(R8)
+I(MOVSXr32r16 , "movsx", 0xBF, 0, X86II::MRMSrcReg | X86II::TB, NoIR, NoIR) // R32 = signext(R16)
+I(MOVZXr16r8 , "movzx", 0xB6, 0, X86II::MRMSrcReg | X86II::TB | // R16 = zeroext(R8)
+ X86II::OpSize, NoIR, NoIR)
+I(MOVZXr32r8 , "movzx", 0xB6, 0, X86II::MRMSrcReg | X86II::TB, NoIR, NoIR) // R32 = zeroext(R8)
+I(MOVZXr32r16 , "movzx", 0xB7, 0, X86II::MRMSrcReg | X86II::TB, NoIR, NoIR) // R32 = zeroext(R16)
+
+
+//===----------------------------------------------------------------------===//
+// Floating point support
+//===----------------------------------------------------------------------===//
+
+// FIXME: These need to indicate mod/ref sets for FP regs... & FP 'TOP'
+
+// Floating point pseudo instructions...
+I(FpMOV , "FMOV" , 0, M_PSEUDO_FLAG, X86II::ArgF80 | X86II::Pseudo | X86II::SpecialFP, NoIR, NoIR) // f1 = fmov f2
+I(FpADD , "FADD" , 0, M_PSEUDO_FLAG, X86II::ArgF80 | X86II::Pseudo | X86II::TwoArgFP , NoIR, NoIR) // f1 = fadd f2, f3
+I(FpSUB , "FSUB" , 0, M_PSEUDO_FLAG, X86II::ArgF80 | X86II::Pseudo | X86II::TwoArgFP , NoIR, NoIR) // f1 = fsub f2, f3
+I(FpMUL , "FMUL" , 0, M_PSEUDO_FLAG, X86II::ArgF80 | X86II::Pseudo | X86II::TwoArgFP , NoIR, NoIR) // f1 = fmul f2, f3
+I(FpDIV , "FDIV" , 0, M_PSEUDO_FLAG, X86II::ArgF80 | X86II::Pseudo | X86II::TwoArgFP , NoIR, NoIR) // f1 = fdiv f2, f3
+I(FpUCOM , "FUCOM", 0, M_PSEUDO_FLAG, X86II::Void | X86II::ArgF80 | X86II::Pseudo | X86II::TwoArgFP , NoIR, NoIR) // FPSW = fucom f1, f2
+
+I(FpGETRESULT , "FGETRESULT",0, M_PSEUDO_FLAG, X86II::Pseudo | X86II::SpecialFP, NoIR, NoIR) // FPR = ST(0)
+I(FpSETRESULT , "FSETRESULT",0, M_PSEUDO_FLAG | M_TERMINATOR_FLAG, X86II::Void | X86II::Pseudo | X86II::SpecialFP, NoIR, NoIR) // ST(0) = FPR
+
+// Floating point loads & stores... PREFIX ARGTYPE ENCODING FP INST TYPE REF MOD
+I(FLDr32 , "fld", 0xD9, 0, X86II::ArgF32 | X86II::MRMS0m | X86II::ZeroArgFP, NoIR, NoIR) // load float
+I(FLDr64 , "fld", 0xDD, 0, X86II::ArgF64 | X86II::MRMS0m | X86II::ZeroArgFP, NoIR, NoIR) // load double
+I(FLDr80 , "fld", 0xDB, 0, X86II::ArgF80 | X86II::MRMS5m | X86II::ZeroArgFP, NoIR, NoIR) // load extended
+I(FLDrr , "fld", 0xC0, 0, X86II::D9 | X86II::ArgF80 | X86II::AddRegFrm , NoIR, NoIR) // push(ST(i))
+I(FILDr16 , "fild", 0xDF, 0, X86II::Arg16 | X86II::MRMS0m | X86II::ZeroArgFP, NoIR, NoIR) // load signed short
+I(FILDr32 , "fild", 0xDB, 0, X86II::Arg32 | X86II::MRMS0m | X86II::ZeroArgFP, NoIR, NoIR) // load signed int
+I(FILDr64 , "fild", 0xDF, 0, X86II::Arg64 | X86II::MRMS5m | X86II::ZeroArgFP, NoIR, NoIR) // load signed long
+
+
+I(FSTr32 , "fst", 0xD9, 0, X86II::Void | X86II::ArgF32 | X86II::MRMS2m | X86II::OneArgFP , NoIR, NoIR) // store float
+I(FSTr64 , "fst", 0xDD, 0, X86II::Void | X86II::ArgF64 | X86II::MRMS2m | X86II::OneArgFP , NoIR, NoIR) // store double
+I(FSTPr32 , "fstp", 0xD9, 0, X86II::Void | X86II::ArgF32 | X86II::MRMS3m , NoIR, NoIR) // store float, pop
+I(FSTPr64 , "fstp", 0xDD, 0, X86II::Void | X86II::ArgF64 | X86II::MRMS3m , NoIR, NoIR) // store double, pop
+I(FSTPr80 , "fstp", 0xDB, 0, X86II::Void | X86II::ArgF80 | X86II::MRMS7m | X86II::OneArgFP , NoIR, NoIR) // store extended, pop
+I(FSTrr , "fst", 0xD0, 0, X86II::DD | X86II::Void | X86II::ArgF80 | X86II::AddRegFrm , O_ST0, NoIR) // ST(i) = ST(0)
+I(FSTPrr , "fstp", 0xD8, 0, X86II::DD | X86II::Void | X86II::ArgF80 | X86II::AddRegFrm , O_ST0, NoIR) // ST(i) = ST(0), pop
+
+I(FISTr16 , "fist", 0xDF, 0, X86II::Void | X86II::Arg16 | X86II::MRMS2m | X86II::OneArgFP , NoIR, NoIR) // store signed short
+I(FISTr32 , "fist", 0xDB, 0, X86II::Void | X86II::Arg32 | X86II::MRMS2m | X86II::OneArgFP , NoIR, NoIR) // store signed int
+I(FISTPr16 , "fistp", 0xDF, 0, X86II::Void | X86II::Arg16 | X86II::MRMS3m , NoIR, NoIR) // store short, pop
+I(FISTPr32 , "fistp", 0xDB, 0, X86II::Void | X86II::Arg32 | X86II::MRMS3m , NoIR, NoIR) // store int, pop
+I(FISTPr64 , "fistpll", 0xDF, 0, X86II::Void | X86II::Arg64 | X86II::MRMS7m | X86II::OneArgFP , NoIR, NoIR) // store long, pop
+
+
+I(FXCH , "fxch" , 0xC8, 0, X86II::D9 | X86II::Void | X86II::ArgF80 | X86II::AddRegFrm , O_ST0, O_ST0) // fxch ST(i), ST(0)
+
+// Floating point constant loads...
+I(FLD0 , "fldz" , 0xEE, 0, X86II::D9 | X86II::ArgF80 | X86II::RawFrm | X86II::ZeroArgFP, NoIR, NoIR) // load +0.0
+I(FLD1 , "fld1" , 0xE8, 0, X86II::D9 | X86II::ArgF80 | X86II::RawFrm | X86II::ZeroArgFP, NoIR, NoIR) // load +1.0
+
+// Binary arithmetic operations...
+I(FADDST0r , "fadd", 0xC0, 0, X86II::D8 | X86II::ArgF80 | X86II::AddRegFrm , O_ST0, O_ST0) // ST(0) = ST(0) + ST(i)
+I(FADDrST0 , "fadd", 0xC0, 0, X86II::DC | X86II::ArgF80 | X86II::AddRegFrm | X86II::PrintImplUses, O_ST0, NoIR) // ST(i) = ST(i) + ST(0)
+I(FADDPrST0 , "faddp", 0xC0, 0, X86II::DE | X86II::ArgF80 | X86II::AddRegFrm , O_ST0, NoIR) // ST(i) = ST(i) + ST(0), pop
+
+I(FSUBRST0r , "fsubr" , 0xE8, 0, X86II::D8 | X86II::ArgF80 | X86II::AddRegFrm , O_ST0, O_ST0) // ST(0) = ST(i) - ST(0)
+I(FSUBrST0 , "fsub" , 0xE8, 0, X86II::DC | X86II::ArgF80 | X86II::AddRegFrm | X86II::PrintImplUses, O_ST0, NoIR) // ST(i) = ST(i) - ST(0)
+I(FSUBPrST0 , "fsubp" , 0xE8, 0, X86II::DE | X86II::ArgF80 | X86II::AddRegFrm , O_ST0, NoIR) // ST(i) = ST(i) - ST(0), pop
+
+I(FSUBST0r , "fsub" , 0xE0, 0, X86II::D8 | X86II::ArgF80 | X86II::AddRegFrm , O_ST0, O_ST0) // ST(0) = ST(0) - ST(i)
+I(FSUBRrST0 , "fsubr" , 0xE0, 0, X86II::DC | X86II::ArgF80 | X86II::AddRegFrm | X86II::PrintImplUses, O_ST0, NoIR) // ST(i) = ST(0) - ST(i)
+I(FSUBRPrST0 , "fsubrp", 0xE0, 0, X86II::DE | X86II::ArgF80 | X86II::AddRegFrm , O_ST0, NoIR) // ST(i) = ST(0) - ST(i), pop
+
+I(FMULST0r , "fmul", 0xC8, 0, X86II::D8 | X86II::ArgF80 | X86II::AddRegFrm , O_ST0, O_ST0) // ST(0) = ST(0) * ST(i)
+I(FMULrST0 , "fmul", 0xC8, 0, X86II::DC | X86II::ArgF80 | X86II::AddRegFrm | X86II::PrintImplUses, O_ST0, NoIR) // ST(i) = ST(i) * ST(0)
+I(FMULPrST0 , "fmulp", 0xC8, 0, X86II::DE | X86II::ArgF80 | X86II::AddRegFrm , O_ST0, NoIR) // ST(i) = ST(i) * ST(0), pop
+
+I(FDIVRST0r , "fdivr" , 0xF8, 0, X86II::D8 | X86II::ArgF80 | X86II::AddRegFrm , O_ST0, O_ST0) // ST(0) = ST(i) / ST(0)
+I(FDIVrST0 , "fdiv" , 0xF8, 0, X86II::DC | X86II::ArgF80 | X86II::AddRegFrm | X86II::PrintImplUses, O_ST0, NoIR) // ST(i) = ST(i) / ST(0)
+I(FDIVPrST0 , "fdivp" , 0xF8, 0, X86II::DE | X86II::ArgF80 | X86II::AddRegFrm , O_ST0, NoIR) // ST(i) = ST(i) / ST(0), pop
+
+I(FDIVST0r , "fdiv" , 0xF0, 0, X86II::D8 | X86II::ArgF80 | X86II::AddRegFrm , O_ST0, O_ST0) // ST(0) = ST(0) / ST(i)
+I(FDIVRrST0 , "fdivr" , 0xF0, 0, X86II::DC | X86II::ArgF80 | X86II::AddRegFrm | X86II::PrintImplUses, O_ST0, NoIR) // ST(i) = ST(0) / ST(i)
+I(FDIVRPrST0 , "fdivrp", 0xF0, 0, X86II::DE | X86II::ArgF80 | X86II::AddRegFrm , O_ST0, NoIR) // ST(i) = ST(0) / ST(i), pop
+
+// Floating point compares
+I(FUCOMr , "fucom" , 0xE0, 0, X86II::DD | X86II::Void | X86II::ArgF80 | X86II::AddRegFrm , O_ST0, NoIR) // FPSW = compare ST(0) with ST(i)
+I(FUCOMPr , "fucomp" , 0xE8, 0, X86II::DD | X86II::Void | X86II::ArgF80 | X86II::AddRegFrm , O_ST0, NoIR) // compare, pop
+I(FUCOMPPr , "fucompp" , 0xE9, 0, X86II::DA | X86II::Void | X86II::RawFrm , O_ST0, NoIR) // compare ST(0) with ST(1), pop, pop
+
+// Floating point flag ops
+I(FNSTSWr8 , "fnstsw" , 0xE0, 0, X86II::DF | X86II::Void | X86II::RawFrm , NoIR, O_AX) // AX = fp flags
+I(FNSTCWm16 , "fnstcw" , 0xD9, 0, X86II::Void | X86II::Arg16 | X86II::MRMS7m , NoIR, NoIR) // [mem16] = X87 Control Word
+I(FLDCWm16 , "fldcw" , 0xD9, 0, X86II::Void | X86II::Arg16 | X86II::MRMS5m , NoIR, NoIR) // X87 Control Word = [mem16]
-// Sign extenders
-I(CBW , "cbw", 0, 0) // AH = signext(AL) 98
-I(CWD , "cwd", 0, 0) // DX = signext(AX) 99
-I(CWQ , "cwq", 0, 0) // EDX= signext(EAX) 99
-I(CWDE , "cwde", 0, 0) // EAX = extend AX 98
// At this point, I is dead, so undefine the macro
#undef I
+#undef NoIR
+
projects / oota-llvm.git / blobdiff