Enhance boolean simplification to handle 16-/64-bit RDRAND

[oota-llvm.git] / lib / Target / X86 / X86InstrInfo.h

diff --git a/lib/Target/X86/X86InstrInfo.h b/lib/Target/X86/X86InstrInfo.h
index 9ed5210b22ff39c5dd70b0921ac828e8a5a1e89a..260f054d69cb7e55b613603b5ba8929c1c746114 100644 (file)
--- a/lib/Target/X86/X86InstrInfo.h
+++ b/lib/Target/X86/X86InstrInfo.h
@@ -61,6 +61,9 @@ namespace X86 {
   // Turn condition code into conditional branch opcode.
   unsigned GetCondBranchFromCond(CondCode CC);
 
+  // Turn CMov opcode into condition code.
+  CondCode getCondFromCMovOpc(unsigned Opc);
+
   /// GetOppositeBranchCondition - Return the inverse of the specified cond,
   /// e.g. turning COND_E to COND_NE.
   CondCode GetOppositeBranchCondition(X86::CondCode CC);
@@ -389,7 +392,11 @@ public:
 
   /// optimizeLoadInstr - Try to remove the load by folding it to a register
   /// operand at the use. We fold the load instructions if and only if the
-  /// def and use are in the same BB.
+  /// def and use are in the same BB. We only look at one load and see
+  /// whether it can be folded into MI. FoldAsLoadDefReg is the virtual register
+  /// defined by the load we are trying to fold. DefMI returns the machine
+  /// instruction that defines FoldAsLoadDefReg, and the function returns
+  /// the machine instruction generated due to folding.
   virtual MachineInstr* optimizeLoadInstr(MachineInstr *MI,
                         const MachineRegisterInfo *MRI,
                         unsigned &FoldAsLoadDefReg,