When generating spill and reload code for vector registers on PowerPC,

[oota-llvm.git] / lib / Target / X86 / X86InstrInfo.td

diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index 9ee2d787be7f83a9ec55281edd3d9f13d57f1400..5c6084fe008386711a6f51584a5a2351438b35e7 100644 (file)
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -418,7 +418,7 @@ def SSECC : Operand<i8> {
 }
 
 def AVXCC : Operand<i8> {
-  let PrintMethod = "printSSECC";
+  let PrintMethod = "printAVXCC";
   let OperandType = "OPERAND_IMMEDIATE";
 }