TB;
let Defs = [RAX, RCX, RDX] in
- def RDTSCP : I<0x01, MRM_F9, (outs), (ins), "rdtscp", []>, TB;
+ def RDTSCP : I<0x01, MRM_F9, (outs), (ins), "rdtscp", [(X86rdtscp)]>, TB;
// CPU flow control instructions
def OUT32ir : Ii8<0xE7, RawFrm, (outs), (ins i8imm:$port),
"out{l}\t{%eax, $port|$port, eax}", [], IIC_OUT_IR>, OpSize32;
-def IN8 : I<0x6C, RawFrmDst, (outs dstidx8:$dst), (ins),
- "insb\t{%dx, $dst|$dst, dx}", [], IIC_INS>;
-def IN16 : I<0x6D, RawFrmDst, (outs dstidx16:$dst), (ins),
- "insw\t{%dx, $dst|$dst, dx}", [], IIC_INS>, OpSize16;
-def IN32 : I<0x6D, RawFrmDst, (outs dstidx32:$dst), (ins),
- "ins{l|d}\t{%dx, $dst|$dst, dx}", [], IIC_INS>, OpSize32;
} // SchedRW
//===----------------------------------------------------------------------===//