//===----------------------------------------------------------------------===//
#include "X86IntelAsmPrinter.h"
+#include "X86TargetAsmInfo.h"
#include "X86.h"
#include "llvm/Constants.h"
#include "llvm/Module.h"
#include "llvm/Assembly/Writer.h"
#include "llvm/Support/Mangler.h"
+#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/Target/TargetOptions.h"
using namespace llvm;
-X86IntelAsmPrinter::X86IntelAsmPrinter(std::ostream &O, X86TargetMachine &TM)
- : X86SharedAsmPrinter(O, TM) {
-}
-
/// runOnMachineFunction - This uses the printMachineInstruction()
/// method to print assembly for each instruction.
///
bool X86IntelAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
- if (forDarwin) {
- // Let PassManager know we need debug information and relay
- // the MachineDebugInfo address on to DwarfWriter.
- DW.SetDebugInfo(&getAnalysis<MachineDebugInfo>());
- }
-
SetupMachineFunction(MF);
O << "\n\n";
EmitConstantPool(MF.getConstantPool());
// Print out labels for the function.
- SwitchSection(".code", MF.getFunction());
+ SwitchToTextSection("_text", MF.getFunction());
EmitAlignment(4);
if (MF.getFunction()->getLinkage() == GlobalValue::ExternalLinkage)
O << "\tpublic " << CurrentFnName << "\n";
O << CurrentFnName << "\tproc near\n";
- if (forDarwin) {
- // Emit pre-function debug information.
- DW.BeginFunction(&MF);
- }
-
// Print out code for the function.
for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
I != E; ++I) {
}
}
- if (forDarwin) {
- // Emit post-function debug information.
- DW.EndFunction();
- }
-
O << CurrentFnName << "\tendp\n";
// We didn't modify anything.
const char *Modifier) {
const MRegisterInfo &RI = *TM.getRegisterInfo();
switch (MO.getType()) {
- case MachineOperand::MO_VirtualRegister:
- if (MRegisterInfo::isPhysicalRegister(MO.getReg()))
- O << RI.get(MO.getReg()).Name;
- else
+ case MachineOperand::MO_Register:
+ if (MRegisterInfo::isPhysicalRegister(MO.getReg())) {
+ unsigned Reg = MO.getReg();
+ if (Modifier && strncmp(Modifier, "subreg", strlen("subreg")) == 0) {
+ MVT::ValueType VT = (strcmp(Modifier,"subreg64") == 0) ?
+ MVT::i64 : ((strcmp(Modifier, "subreg32") == 0) ? MVT::i32 :
+ ((strcmp(Modifier,"subreg16") == 0) ? MVT::i16 :MVT::i8));
+ Reg = getX86SubSuperRegister(Reg, VT);
+ }
+ O << RI.get(Reg).Name;
+ } else
O << "reg" << MO.getReg();
return;
- case MachineOperand::MO_SignExtendedImmed:
- case MachineOperand::MO_UnextendedImmed:
- O << (int)MO.getImmedValue();
+ case MachineOperand::MO_Immediate:
+ O << MO.getImmedValue();
return;
case MachineOperand::MO_MachineBasicBlock:
printBasicBlockLabel(MO.getMachineBasicBlock());
case MachineOperand::MO_ConstantPoolIndex: {
bool isMemOp = Modifier && !strcmp(Modifier, "mem");
if (!isMemOp) O << "OFFSET ";
- O << "[" << PrivateGlobalPrefix << "CPI" << getFunctionNumber() << "_"
- << MO.getConstantPoolIndex();
- if (forDarwin && TM.getRelocationModel() == Reloc::PIC)
- O << "-\"L" << getFunctionNumber() << "$pb\"";
+ O << "[" << TAI->getPrivateGlobalPrefix() << "CPI"
+ << getFunctionNumber() << "_" << MO.getConstantPoolIndex();
int Offset = MO.getOffset();
if (Offset > 0)
O << " + " << Offset;
bool isCallOp = Modifier && !strcmp(Modifier, "call");
bool isMemOp = Modifier && !strcmp(Modifier, "mem");
if (!isMemOp && !isCallOp) O << "OFFSET ";
- if (forDarwin && TM.getRelocationModel() != Reloc::Static) {
- GlobalValue *GV = MO.getGlobal();
- std::string Name = Mang->getValueName(GV);
- if (!isMemOp && !isCallOp) O << '$';
- // Link-once, External, or Weakly-linked global variables need
- // non-lazily-resolved stubs
- if (GV->isExternal() || GV->hasWeakLinkage() ||
- GV->hasLinkOnceLinkage()) {
- // Dynamically-resolved functions need a stub for the function.
- if (isCallOp && isa<Function>(GV) && cast<Function>(GV)->isExternal()) {
- FnStubs.insert(Name);
- O << "L" << Name << "$stub";
- } else {
- GVStubs.insert(Name);
- O << "L" << Name << "$non_lazy_ptr";
- }
- } else {
- O << Mang->getValueName(GV);
- }
- if (!isCallOp && TM.getRelocationModel() == Reloc::PIC)
- O << "-\"L" << getFunctionNumber() << "$pb\"";
- } else
- O << Mang->getValueName(MO.getGlobal());
+ O << Mang->getValueName(MO.getGlobal());
int Offset = MO.getOffset();
if (Offset > 0)
O << " + " << Offset;
}
case MachineOperand::MO_ExternalSymbol: {
bool isCallOp = Modifier && !strcmp(Modifier, "call");
- if (isCallOp && forDarwin && TM.getRelocationModel() != Reloc::Static) {
- std::string Name(GlobalPrefix);
- Name += MO.getSymbolName();
- FnStubs.insert(Name);
- O << "L" << Name << "$stub";
- return;
- }
if (!isCallOp) O << "OFFSET ";
- O << GlobalPrefix << MO.getSymbolName();
+ O << TAI->getGlobalPrefix() << MO.getSymbolName();
return;
}
default:
}
}
-void X86IntelAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op){
+void X86IntelAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op,
+ const char *Modifier) {
assert(isMem(MI, Op) && "Invalid memory reference!");
const MachineOperand &BaseReg = MI->getOperand(Op);
O << "[";
bool NeedPlus = false;
if (BaseReg.getReg()) {
- printOp(BaseReg, "mem");
+ printOp(BaseReg, Modifier);
NeedPlus = true;
}
if (NeedPlus) O << " + ";
if (ScaleVal != 1)
O << ScaleVal << "*";
- printOp(IndexReg);
+ printOp(IndexReg, Modifier);
NeedPlus = true;
}
const char Mode) {
const MRegisterInfo &RI = *TM.getRegisterInfo();
unsigned Reg = MO.getReg();
- const char *Name = RI.get(Reg).Name;
switch (Mode) {
default: return true; // Unknown mode.
case 'b': // Print QImode register
- switch (Reg) {
- default: return true;
- case X86::AH: case X86::AL: case X86::AX: case X86::EAX:
- Name = "AL";
- break;
- case X86::DH: case X86::DL: case X86::DX: case X86::EDX:
- Name = "DL";
- break;
- case X86::CH: case X86::CL: case X86::CX: case X86::ECX:
- Name = "CL";
- break;
- case X86::BH: case X86::BL: case X86::BX: case X86::EBX:
- Name = "BL";
- break;
- case X86::ESI:
- Name = "SIL";
- break;
- case X86::EDI:
- Name = "DIL";
- break;
- case X86::EBP:
- Name = "BPL";
- break;
- case X86::ESP:
- Name = "SPL";
- break;
- }
+ Reg = getX86SubSuperRegister(Reg, MVT::i8);
break;
case 'h': // Print QImode high register
- switch (Reg) {
- default: return true;
- case X86::AH: case X86::AL: case X86::AX: case X86::EAX:
- Name = "AL";
- break;
- case X86::DH: case X86::DL: case X86::DX: case X86::EDX:
- Name = "DL";
- break;
- case X86::CH: case X86::CL: case X86::CX: case X86::ECX:
- Name = "CL";
- break;
- case X86::BH: case X86::BL: case X86::BX: case X86::EBX:
- Name = "BL";
- break;
- }
+ Reg = getX86SubSuperRegister(Reg, MVT::i8, true);
break;
case 'w': // Print HImode register
- switch (Reg) {
- default: return true;
- case X86::AH: case X86::AL: case X86::AX: case X86::EAX:
- Name = "AX";
- break;
- case X86::DH: case X86::DL: case X86::DX: case X86::EDX:
- Name = "DX";
- break;
- case X86::CH: case X86::CL: case X86::CX: case X86::ECX:
- Name = "CX";
- break;
- case X86::BH: case X86::BL: case X86::BX: case X86::EBX:
- Name = "BX";
- break;
- case X86::ESI:
- Name = "SI";
- break;
- case X86::EDI:
- Name = "DI";
- break;
- case X86::EBP:
- Name = "BP";
- break;
- case X86::ESP:
- Name = "SP";
- break;
- }
+ Reg = getX86SubSuperRegister(Reg, MVT::i16);
break;
case 'k': // Print SImode register
- switch (Reg) {
- default: return true;
- case X86::AH: case X86::AL: case X86::AX: case X86::EAX:
- Name = "EAX";
- break;
- case X86::DH: case X86::DL: case X86::DX: case X86::EDX:
- Name = "EDX";
- break;
- case X86::CH: case X86::CL: case X86::CX: case X86::ECX:
- Name = "ECX";
- break;
- case X86::BH: case X86::BL: case X86::BX: case X86::EBX:
- Name = "EBX";
- break;
- case X86::ESI:
- Name = "ESI";
- break;
- case X86::EDI:
- Name = "EDI";
- break;
- case X86::EBP:
- Name = "EBP";
- break;
- case X86::ESP:
- Name = "ESP";
- break;
- }
+ Reg = getX86SubSuperRegister(Reg, MVT::i32);
break;
}
- O << Name;
+ O << '%' << RI.get(Reg).Name;
return false;
}
void X86IntelAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
++EmittedInsts;
+ // See if a truncate instruction can be turned into a nop.
+ switch (MI->getOpcode()) {
+ default: break;
+ case X86::TRUNC_64to32:
+ case X86::TRUNC_64to16:
+ case X86::TRUNC_32to16:
+ case X86::TRUNC_32to8:
+ case X86::TRUNC_16to8:
+ case X86::TRUNC_32_to8:
+ case X86::TRUNC_16_to8: {
+ const MachineOperand &MO0 = MI->getOperand(0);
+ const MachineOperand &MO1 = MI->getOperand(1);
+ unsigned Reg0 = MO0.getReg();
+ unsigned Reg1 = MO1.getReg();
+ unsigned Opc = MI->getOpcode();
+ if (Opc == X86::TRUNC_64to32)
+ Reg1 = getX86SubSuperRegister(Reg1, MVT::i32);
+ else if (Opc == X86::TRUNC_32to16 || Opc == X86::TRUNC_64to16)
+ Reg1 = getX86SubSuperRegister(Reg1, MVT::i16);
+ else
+ Reg1 = getX86SubSuperRegister(Reg1, MVT::i8);
+ O << TAI->getCommentString() << " TRUNCATE ";
+ if (Reg0 != Reg1)
+ O << "\n\t";
+ break;
+ }
+ case X86::PsMOVZX64rr32:
+ O << TAI->getCommentString() << " ZERO-EXTEND " << "\n\t";
+ break;
+ }
+
// Call the autogenerated instruction printer routines.
printInstruction(MI);
}
bool X86IntelAsmPrinter::doInitialization(Module &M) {
X86SharedAsmPrinter::doInitialization(M);
- CommentString = ";";
- GlobalPrefix = "_";
- PrivateGlobalPrefix = "$";
- AlignDirective = "\talign\t";
- MLSections = true;
- ZeroDirective = "\tdb\t";
- ZeroDirectiveSuffix = " dup(0)";
- AsciiDirective = "\tdb\t";
- AscizDirective = 0;
- Data8bitsDirective = "\t.db\t";
- Data16bitsDirective = "\t.dw\t";
- Data32bitsDirective = "\t.dd\t";
- Data64bitsDirective = "\t.dq\t";
- HasDotTypeDotSizeDirective = false;
+
Mang->markCharUnacceptable('.');
O << "\t.686\n\t.model flat\n\n";
if (I->isExternal())
O << "\textern " << Mang->getValueName(I) << ":near\n";
- // Emit declarations for external globals.
+ // Emit declarations for external globals. Note that VC++ always declares
+ // external globals to have type byte, and if that's good enough for VC++...
for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
I != E; ++I) {
if (I->isExternal())
O << "\textern " << Mang->getValueName(I) << ":byte\n";
- else if (I->getLinkage() == GlobalValue::ExternalLinkage)
- O << "\tpublic " << Mang->getValueName(I) << "\n";
}
return false;
}
bool X86IntelAsmPrinter::doFinalization(Module &M) {
- X86SharedAsmPrinter::doFinalization(M);
- SwitchSection("", 0);
+ const TargetData *TD = TM.getTargetData();
+
+ // Print out module-level global variables here.
+ for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
+ I != E; ++I) {
+ if (I->isExternal()) continue; // External global require no code
+
+ // Check to see if this is a special global used by LLVM, if so, emit it.
+ if (EmitSpecialLLVMGlobal(I))
+ continue;
+
+ std::string name = Mang->getValueName(I);
+ Constant *C = I->getInitializer();
+ unsigned Size = TD->getTypeSize(C->getType());
+ unsigned Align = getPreferredAlignmentLog(I);
+ bool bCustomSegment = false;
+
+ switch (I->getLinkage()) {
+ case GlobalValue::LinkOnceLinkage:
+ case GlobalValue::WeakLinkage:
+ SwitchToDataSection("", 0);
+ O << name << "?\tsegment common 'COMMON'\n";
+ bCustomSegment = true;
+ // FIXME: the default alignment is 16 bytes, but 1, 2, 4, and 256
+ // are also available.
+ break;
+ case GlobalValue::AppendingLinkage:
+ SwitchToDataSection("", 0);
+ O << name << "?\tsegment public 'DATA'\n";
+ bCustomSegment = true;
+ // FIXME: the default alignment is 16 bytes, but 1, 2, 4, and 256
+ // are also available.
+ break;
+ case GlobalValue::ExternalLinkage:
+ O << "\tpublic " << name << "\n";
+ // FALL THROUGH
+ case GlobalValue::InternalLinkage:
+ SwitchToDataSection(TAI->getDataSection(), I);
+ break;
+ default:
+ assert(0 && "Unknown linkage type!");
+ }
+
+ if (!bCustomSegment)
+ EmitAlignment(Align, I);
+
+ O << name << ":\t\t\t\t" << TAI->getCommentString()
+ << " " << I->getName() << '\n';
+
+ EmitGlobalConstant(C);
+
+ if (bCustomSegment)
+ O << name << "?\tends\n";
+ }
+
+ // Bypass X86SharedAsmPrinter::doFinalization().
+ AsmPrinter::doFinalization(M);
+ SwitchToDataSection("", 0);
O << "\tend\n";
- return false;
+ return false; // success
}
void X86IntelAsmPrinter::EmitString(const ConstantArray *CVA) const {