- Renamed AddedCost to AddedComplexity.

[oota-llvm.git] / lib / Target / X86 / X86IntelAsmPrinter.h

diff --git a/lib/Target/X86/X86IntelAsmPrinter.h b/lib/Target/X86/X86IntelAsmPrinter.h
index 4dec56aeaf26fe8ecceff0374befc55ee6658888..13d0ad6499eadb7a0e7dc03e748dcd8b334aac48 100755 (executable)
--- a/lib/Target/X86/X86IntelAsmPrinter.h
+++ b/lib/Target/X86/X86IntelAsmPrinter.h
@@ -16,14 +16,12 @@
 
 #include "X86AsmPrinter.h"
 #include "llvm/CodeGen/ValueTypes.h"
-#include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/MRegisterInfo.h"
 
 namespace llvm {
-namespace x86 {
 
 struct X86IntelAsmPrinter : public X86SharedAsmPrinter {
-  X86IntelAsmPrinter(std::ostream &O, TargetMachine &TM)
+ X86IntelAsmPrinter(std::ostream &O, X86TargetMachine &TM)
     : X86SharedAsmPrinter(O, TM) { }
 
   virtual const char *getPassName() const {
@@ -37,45 +35,60 @@ struct X86IntelAsmPrinter : public X86SharedAsmPrinter {
   bool printInstruction(const MachineInstr *MI);
 
   // This method is used by the tablegen'erated instruction printer.
-  void printOperand(const MachineInstr *MI, unsigned OpNo, MVT::ValueType VT){
+  void printOperand(const MachineInstr *MI, unsigned OpNo,
+                    const char *Modifier = 0) {
     const MachineOperand &MO = MI->getOperand(OpNo);
     if (MO.getType() == MachineOperand::MO_MachineRegister) {
       assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physref??");
       // Bug Workaround: See note in Printer::doInitialization about %.
       O << "%" << TM.getRegisterInfo()->get(MO.getReg()).Name;
     } else {
-      printOp(MO);
+      printOp(MO, Modifier);
     }
   }
 
-  void printCallOperand(const MachineInstr *MI, unsigned OpNo,
-                        MVT::ValueType VT) {
-    printOp(MI->getOperand(OpNo), true); // Don't print "OFFSET".
+  void printi8mem(const MachineInstr *MI, unsigned OpNo) {
+    O << "BYTE PTR ";
+    printMemReference(MI, OpNo);
   }
-
-  void printMemoryOperand(const MachineInstr *MI, unsigned OpNo,
-                          MVT::ValueType VT) {
-    switch (VT) {
-    default: assert(0 && "Unknown arg size!");
-    case MVT::i8:   O << "BYTE PTR "; break;
-    case MVT::i16:  O << "WORD PTR "; break;
-    case MVT::i32:
-    case MVT::f32:  O << "DWORD PTR "; break;
-    case MVT::i64:
-    case MVT::f64:  O << "QWORD PTR "; break;
-    case MVT::f80:  O << "XWORD PTR "; break;
-    }
+  void printi16mem(const MachineInstr *MI, unsigned OpNo) {
+    O << "WORD PTR ";
+    printMemReference(MI, OpNo);
+  }
+  void printi32mem(const MachineInstr *MI, unsigned OpNo) {
+    O << "DWORD PTR ";
+    printMemReference(MI, OpNo);
+  }
+  void printi64mem(const MachineInstr *MI, unsigned OpNo) {
+    O << "QWORD PTR ";
+    printMemReference(MI, OpNo);
+  }
+  void printi128mem(const MachineInstr *MI, unsigned OpNo) {
+    O << "XMMWORD PTR ";
+    printMemReference(MI, OpNo);
+  }
+  void printf32mem(const MachineInstr *MI, unsigned OpNo) {
+    O << "DWORD PTR ";
+    printMemReference(MI, OpNo);
+  }
+  void printf64mem(const MachineInstr *MI, unsigned OpNo) {
+    O << "QWORD PTR ";
+    printMemReference(MI, OpNo);
+  }
+  void printf128mem(const MachineInstr *MI, unsigned OpNo) {
+    O << "XMMWORD PTR ";
     printMemReference(MI, OpNo);
   }
 
   void printMachineInstruction(const MachineInstr *MI);
-  void printOp(const MachineOperand &MO, bool elideOffsetKeyword = false);
+  void printOp(const MachineOperand &MO, const char *Modifier = 0);
+  void printSSECC(const MachineInstr *MI, unsigned Op);
   void printMemReference(const MachineInstr *MI, unsigned Op);
+  void printPICLabel(const MachineInstr *MI, unsigned Op);
   bool runOnMachineFunction(MachineFunction &F);
   bool doInitialization(Module &M);
 };
 
-} // end namespace x86
 } // end namespace llvm
 
 #endif