JIT support has been added awhile ago.

[oota-llvm.git] / lib / Target / X86 / X86MCInstLower.cpp

diff --git a/lib/Target/X86/X86MCInstLower.cpp b/lib/Target/X86/X86MCInstLower.cpp
index 7f0af3e581acbc8e093cca5fe8abfe437e58a9b9..892396bc4edab57ef181414c3cdcac20bbfd065b 100644 (file)
--- a/lib/Target/X86/X86MCInstLower.cpp
+++ b/lib/Target/X86/X86MCInstLower.cpp
@@ -75,10 +75,10 @@ namespace llvm {
 
   void
   X86AsmPrinter::StackMapShadowTracker::startFunction(MachineFunction &MF) {
-    CodeEmitter.reset(TM.getTarget().createMCCodeEmitter(*TM.getInstrInfo(),
-                                                         *TM.getRegisterInfo(),
-                                                         *TM.getSubtargetImpl(),
-                                                         MF.getContext()));
+    CodeEmitter.reset(TM.getTarget().createMCCodeEmitter(
+        *TM.getSubtargetImpl()->getInstrInfo(),
+        *TM.getSubtargetImpl()->getRegisterInfo(), *TM.getSubtargetImpl(),
+        MF.getContext()));
   }
 
   void X86AsmPrinter::StackMapShadowTracker::count(MCInst &Inst,
@@ -124,7 +124,7 @@ MachineModuleInfoMachO &X86MCInstLower::getMachOMMI() const {
 /// operand to an MCSymbol.
 MCSymbol *X86MCInstLower::
 GetSymbolFromOperand(const MachineOperand &MO) const {
-  const DataLayout *DL = TM.getDataLayout();
+  const DataLayout *DL = TM.getSubtargetImpl()->getDataLayout();
   assert((MO.isGlobal() || MO.isSymbol() || MO.isMBB()) && "Isn't a symbol reference");
 
   SmallString<128> Name;
@@ -842,8 +842,8 @@ PrevCrossBBInst(MachineBasicBlock::const_iterator MBBI) {
 
 void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
   X86MCInstLower MCInstLowering(*MF, *this);
-  const X86RegisterInfo *RI =
-      static_cast<const X86RegisterInfo *>(TM.getRegisterInfo());
+  const X86RegisterInfo *RI = static_cast<const X86RegisterInfo *>(
+      TM.getSubtargetImpl()->getRegisterInfo());
 
   switch (MI->getOpcode()) {
   case TargetOpcode::DBG_VALUE:
@@ -1006,7 +1006,7 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
     SmallVector<int, 16> Mask;
 
     assert(MI->getNumOperands() >= 6 &&
-           "Wrong number of operansd for PSHUFBrm or VPSHUFBrm");
+           "Wrong number of operands for PSHUFBrm or VPSHUFBrm");
     const MachineOperand &DstOp = MI->getOperand(0);
     const MachineOperand &SrcOp = MI->getOperand(1);
     const MachineOperand &MaskOp = MI->getOperand(5);