done

[oota-llvm.git] / lib / Target / X86 / X86RegisterInfo.cpp

diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp
index 4b13dac63c95fb18de0ed3d89620545046fec3d8..3737c0e79e7976a61295ed705da543fec5dac2ad 100644 (file)
--- a/lib/Target/X86/X86RegisterInfo.cpp
+++ b/lib/Target/X86/X86RegisterInfo.cpp
@@ -31,6 +31,7 @@
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetOptions.h"
 #include "llvm/Support/CommandLine.h"
+#include "llvm/ADT/BitVector.h"
 #include "llvm/ADT/STLExtras.h"
 using namespace llvm;
 
@@ -88,11 +89,14 @@ void X86RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
     Opc = X86::MOVSDmr;
   } else if (RC == &X86::VR128RegClass) {
     Opc = X86::MOVAPSmr;
+  } else if (RC == &X86::VR64RegClass) {
+    Opc = X86::MMX_MOVQ64mr;
   } else {
     assert(0 && "Unknown regclass");
     abort();
   }
-  addFrameReference(BuildMI(MBB, MI, TII.get(Opc)), FrameIdx).addReg(SrcReg);
+  addFrameReference(BuildMI(MBB, MI, TII.get(Opc)), FrameIdx)
+    .addReg(SrcReg, false, false, true);
 }
 
 void X86RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
@@ -120,6 +124,8 @@ void X86RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
     Opc = X86::MOVSDrm;
   } else if (RC == &X86::VR128RegClass) {
     Opc = X86::MOVAPSrm;
+  } else if (RC == &X86::VR64RegClass) {
+    Opc = X86::MMX_MOVQ64rm;
   } else {
     assert(0 && "Unknown regclass");
     abort();
@@ -152,6 +158,8 @@ void X86RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
     Opc = X86::FsMOVAPDrr;
   } else if (RC == &X86::VR128RegClass) {
     Opc = X86::MOVAPSrr;
+  } else if (RC == &X86::VR64RegClass) {
+    Opc = X86::MMX_MOVQ64rr;
   } else {
     assert(0 && "Unknown regclass");
     abort();
@@ -159,6 +167,16 @@ void X86RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
   BuildMI(MBB, MI, TII.get(Opc), DestReg).addReg(SrcReg);
 }
 
+
+void X86RegisterInfo::reMaterialize(MachineBasicBlock &MBB,
+                                    MachineBasicBlock::iterator I,
+                                    unsigned DestReg,
+                                    const MachineInstr *Orig) const {
+  MachineInstr *MI = Orig->clone();
+  MI->getOperand(0).setReg(DestReg);
+  MBB.insert(I, MI);
+}
+
 static MachineInstr *FuseTwoAddrInst(unsigned Opcode, unsigned FrameIndex,
                                      MachineInstr *MI,
                                      const TargetInstrInfo &TII) {
@@ -883,6 +901,21 @@ X86RegisterInfo::getCalleeSavedRegClasses() const {
   return Is64Bit ? CalleeSavedRegClasses64Bit : CalleeSavedRegClasses32Bit;
 }
 
+BitVector X86RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
+  BitVector Reserved(getNumRegs());
+  Reserved.set(X86::RSP);
+  Reserved.set(X86::ESP);
+  Reserved.set(X86::SP);
+  Reserved.set(X86::SPL);
+  if (hasFP(MF)) {
+    Reserved.set(X86::RBP);
+    Reserved.set(X86::EBP);
+    Reserved.set(X86::BP);
+    Reserved.set(X86::BPL);
+  }
+  return Reserved;
+}
+
 //===----------------------------------------------------------------------===//
 // Stack Frame Processing methods
 //===----------------------------------------------------------------------===//
@@ -951,7 +984,8 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
   MBB.erase(I);
 }
 
-void X86RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const{
+void X86RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
+                                          RegScavenger *RS) const{
   unsigned i = 0;
   MachineInstr &MI = *II;
   MachineFunction &MF = *MI.getParent()->getParent();
@@ -995,10 +1029,9 @@ void X86RegisterInfo::emitPrologue(MachineFunction &MF) const {
   const Function* Fn = MF.getFunction();
   const X86Subtarget* Subtarget = &MF.getTarget().getSubtarget<X86Subtarget>();
   MachineInstr *MI;
-  MachineDebugInfo *DebugInfo = MFI->getMachineDebugInfo();
+  MachineModuleInfo *MMI = MFI->getMachineModuleInfo();
   
-  // Prepare for debug frame info.
-  bool hasInfo = DebugInfo && DebugInfo->hasInfo();
+  // Prepare for frame info.
   unsigned FrameLabelId = 0;
   
   // Get the number of bytes to allocate from the FrameInfo
@@ -1023,9 +1056,9 @@ void X86RegisterInfo::emitPrologue(MachineFunction &MF) const {
     }
   }
 
-  if (hasInfo) {
+  if (MMI && MMI->needsFrameInfo()) {
     // Mark effective beginning of when frame pointer becomes valid.
-    FrameLabelId = DebugInfo->NextLabelID();
+    FrameLabelId = MMI->NextLabelID();
     BuildMI(MBB, MBBI, TII.get(X86::LABEL)).addImm(FrameLabelId);
   }
   
@@ -1053,8 +1086,8 @@ void X86RegisterInfo::emitPrologue(MachineFunction &MF) const {
     MBB.insert(MBBI, MI);
   }
 
-  if (hasInfo) {
-    std::vector<MachineMove> &Moves = DebugInfo->getFrameMoves();
+  if (MMI && MMI->needsFrameInfo()) {
+    std::vector<MachineMove> &Moves = MMI->getFrameMoves();
     
     if (NumBytes) {
       // Show update of SP.
@@ -1077,7 +1110,7 @@ void X86RegisterInfo::emitPrologue(MachineFunction &MF) const {
     }
     
     // Mark effective beginning of when frame pointer is ready.
-    unsigned ReadyLabelId = DebugInfo->NextLabelID();
+    unsigned ReadyLabelId = MMI->NextLabelID();
     BuildMI(MBB, MBBI, TII.get(X86::LABEL)).addImm(ReadyLabelId);
     
     MachineLocation FPDst(hasFP(MF) ? FramePtr : StackPtr);
@@ -1178,6 +1211,16 @@ void X86RegisterInfo::getInitialFrameState(std::vector<MachineMove> &Moves)
   Moves.push_back(MachineMove(0, Dst, Src));
 }
 
+unsigned X86RegisterInfo::getEHExceptionRegister() const {
+  assert(0 && "What is the exception register");
+  return 0;
+}
+
+unsigned X86RegisterInfo::getEHHandlerRegister() const {
+  assert(0 && "What is the exception handler register");
+  return 0;
+}
+
 namespace llvm {
 unsigned getX86SubSuperRegister(unsigned Reg, MVT::ValueType VT, bool High) {
   switch (VT) {