-//===- X86RegisterInfo.h - X86 Register Information Impl ----------*-C++-*-===//
+//===- X86RegisterInfo.h - X86 Register Information Impl --------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
//
// This file contains the X86 implementation of the MRegisterInfo class.
//
#define X86REGISTERINFO_H
#include "llvm/Target/MRegisterInfo.h"
+#include "X86GenRegisterInfo.h.inc"
-class Type;
-
-struct X86RegisterInfo : public MRegisterInfo {
- X86RegisterInfo();
+namespace llvm {
+ class Type;
+ class TargetInstrInfo;
+ class X86TargetMachine;
- MRegisterInfo::const_iterator regclass_begin() const;
- MRegisterInfo::const_iterator regclass_end() const;
+class X86RegisterInfo : public X86GenRegisterInfo {
+public:
+ X86TargetMachine &TM;
+ const TargetInstrInfo &TII;
- MachineBasicBlock::iterator
- storeReg2RegOffset(MachineBasicBlock *MBB,
- MachineBasicBlock::iterator MBBI,
- unsigned DestReg, unsigned SrcReg,
- unsigned ImmOffset, unsigned dataSize) const;
+private:
+ /// Is64Bit - Is the target 64-bits.
+ bool Is64Bit;
- MachineBasicBlock::iterator
- loadRegOffset2Reg(MachineBasicBlock *MBB,
- MachineBasicBlock::iterator MBBI,
- unsigned DestReg, unsigned SrcReg,
- unsigned ImmOffset, unsigned dataSize) const;
+ /// SlotSize - Stack slot size in bytes.
+ unsigned SlotSize;
- MachineBasicBlock::iterator
- moveReg2Reg(MachineBasicBlock *MBB,
- MachineBasicBlock::iterator MBBI,
- unsigned DestReg, unsigned SrcReg, unsigned dataSize) const;
+ /// StackPtr - X86 physical register used as stack ptr.
+ unsigned StackPtr;
- MachineBasicBlock::iterator
- moveImm2Reg(MachineBasicBlock *MBB,
- MachineBasicBlock::iterator MBBI,
- unsigned DestReg, unsigned Imm, unsigned dataSize) const;
+ /// FramePtr - X86 physical register used as frame ptr.
+ unsigned FramePtr;
- unsigned getFramePointer() const;
- unsigned getStackPointer() const;
+public:
+ X86RegisterInfo(X86TargetMachine &tm, const TargetInstrInfo &tii);
- const unsigned* getCalleeSaveRegs() const;
- const unsigned* getCallerSaveRegs() const;
+ /// Code Generation virtual methods...
+ void storeRegToStackSlot(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MI,
+ unsigned SrcReg, int FrameIndex,
+ const TargetRegisterClass *RC) const;
- MachineBasicBlock::iterator emitPrologue(MachineBasicBlock *MBB,
- MachineBasicBlock::iterator MBBI,
- unsigned numBytes) const;
+ void loadRegFromStackSlot(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MI,
+ unsigned DestReg, int FrameIndex,
+ const TargetRegisterClass *RC) const;
- MachineBasicBlock::iterator emitEpilogue(MachineBasicBlock *MBB,
- MachineBasicBlock::iterator MBBI,
- unsigned numBytes) const;
-
- /// Returns register class appropriate for input SSA register
- ///
- const TargetRegisterClass *getClassForReg(unsigned Reg) const;
-
- const TargetRegisterClass* getRegClassForType(const Type* Ty) const;
+ void copyRegToReg(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MI,
+ unsigned DestReg, unsigned SrcReg,
+ const TargetRegisterClass *RC) const;
+
+ void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
+ unsigned DestReg, const MachineInstr *Orig) const;
+
+ /// foldMemoryOperand - If this target supports it, fold a load or store of
+ /// the specified stack slot into the specified machine instruction for the
+ /// specified operand. If this is possible, the target should perform the
+ /// folding and return true, otherwise it should return false. If it folds
+ /// the instruction, it is likely that the MachineInstruction the iterator
+ /// references has been changed.
+ MachineInstr* foldMemoryOperand(MachineInstr* MI,
+ unsigned OpNum,
+ int FrameIndex) const;
+
+ /// getCalleeSavedRegs - Return a null-terminated list of all of the
+ /// callee-save registers on this target.
+ const unsigned *getCalleeSavedRegs() const;
+
+ /// getCalleeSavedRegClasses - Return a null-terminated list of the preferred
+ /// register classes to spill each callee-saved register with. The order and
+ /// length of this list match the getCalleeSavedRegs() list.
+ const TargetRegisterClass* const* getCalleeSavedRegClasses() const;
+
+ /// getReservedRegs - Returns a bitset indexed by physical register number
+ /// indicating if a register is a special register that has particular uses and
+ /// should be considered unavailable at all times, e.g. SP, RA. This is used by
+ /// register scavenger to determine what registers are free.
+ BitVector getReservedRegs(const MachineFunction &MF) const;
+
+ bool hasFP(const MachineFunction &MF) const;
+
+ void eliminateCallFramePseudoInstr(MachineFunction &MF,
+ MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MI) const;
+
+ void eliminateFrameIndex(MachineBasicBlock::iterator MI,
+ RegScavenger *RS = NULL) const;
+
+ void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
+
+ void emitPrologue(MachineFunction &MF) const;
+ void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
+
+ // Debug information queries.
+ unsigned getRARegister() const;
+ unsigned getFrameRegister(MachineFunction &MF) const;
+ void getInitialFrameState(std::vector<MachineMove> &Moves) const;
+
+ // Exception handling queries.
+ unsigned getEHExceptionRegister() const;
+ unsigned getEHHandlerRegister() const;
+};
- unsigned getNumRegClasses() const;
+// getX86SubSuperRegister - X86 utility function. It returns the sub or super
+// register of a specific X86 register.
+// e.g. getX86SubSuperRegister(X86::EAX, MVT::i16) return X86:AX
+unsigned getX86SubSuperRegister(unsigned, MVT::ValueType, bool High=false);
-};
+} // End llvm namespace
#endif
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