Fix a long-standing wart in the code generator: two-address instruction lowering

[oota-llvm.git] / lib / Target / X86 / X86RegisterInfo.h

diff --git a/lib/Target/X86/X86RegisterInfo.h b/lib/Target/X86/X86RegisterInfo.h
index be3cbc09bc1909df623dd46f556ca52ba082c26b..e86cc28d52c896cd5ca1318d93c34286a43c617c 100644 (file)
--- a/lib/Target/X86/X86RegisterInfo.h
+++ b/lib/Target/X86/X86RegisterInfo.h
@@ -1,4 +1,11 @@
-//===- X86RegisterInfo.h - X86 Register Information Impl ----------*-C++-*-===//
+//===- X86RegisterInfo.h - X86 Register Information Impl --------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
 //
 // This file contains the X86 implementation of the MRegisterInfo class.
 //
@@ -8,41 +15,72 @@
 #define X86REGISTERINFO_H
 
 #include "llvm/Target/MRegisterInfo.h"
+#include "X86GenRegisterInfo.h.inc"
 
-class Type;
+namespace llvm {
+  class Type;
+  class TargetInstrInfo;
 
-struct X86RegisterInfo : public MRegisterInfo {
-  X86RegisterInfo();
+struct X86RegisterInfo : public X86GenRegisterInfo {
+  const TargetInstrInfo &TII;
+  X86RegisterInfo(const TargetInstrInfo &tii);
 
-  MRegisterInfo::const_iterator const_regclass_begin() const;
-  MRegisterInfo::const_iterator const_regclass_end() const;
+  /// Code Generation virtual methods...
+  void storeRegToStackSlot(MachineBasicBlock &MBB,
+                           MachineBasicBlock::iterator MI,
+                           unsigned SrcReg, int FrameIndex,
+                           const TargetRegisterClass *RC) const;
 
-  MachineBasicBlock::iterator
-  storeReg2RegOffset(MachineBasicBlock *MBB,
-                     MachineBasicBlock::iterator MBBI,
-                     unsigned DestReg, unsigned SrcReg, 
-                     unsigned ImmOffset, unsigned dataSize) const;
+  void loadRegFromStackSlot(MachineBasicBlock &MBB,
+                            MachineBasicBlock::iterator MI,
+                            unsigned DestReg, int FrameIndex,
+                            const TargetRegisterClass *RC) const;
 
-  MachineBasicBlock::iterator
-  loadRegOffset2Reg(MachineBasicBlock *MBB,
-                    MachineBasicBlock::iterator MBBI,
+  void copyRegToReg(MachineBasicBlock &MBB,
+                    MachineBasicBlock::iterator MI,
                     unsigned DestReg, unsigned SrcReg,
-                    unsigned ImmOffset, unsigned dataSize) const;
+                    const TargetRegisterClass *RC) const;
 
-  unsigned getFramePointer() const;
-  unsigned getStackPointer() const;
+  /// foldMemoryOperand - If this target supports it, fold a load or store of
+  /// the specified stack slot into the specified machine instruction for the
+  /// specified operand.  If this is possible, the target should perform the
+  /// folding and return true, otherwise it should return false.  If it folds
+  /// the instruction, it is likely that the MachineInstruction the iterator
+  /// references has been changed.
+  MachineInstr* foldMemoryOperand(MachineInstr* MI,
+                                  unsigned OpNum,
+                                  int FrameIndex) const;
 
-  const unsigned* getCalleeSaveRegs() const;
-  const unsigned* getCallerSaveRegs() const;
+  /// getCalleeSaveRegs - Return a null-terminated list of all of the
+  /// callee-save registers on this target.
+  const unsigned *getCalleeSaveRegs() const;
 
-  /// Returns register class appropriate for input SSA register
-  /// 
-  const TargetRegisterClass *getClassForReg(unsigned Reg) const;
+  /// getCalleeSaveRegClasses - Return a null-terminated list of the preferred
+  /// register classes to spill each callee-saved register with.  The order and
+  /// length of this list match the getCalleeSaveRegs() list.
+  const TargetRegisterClass* const* getCalleeSaveRegClasses() const;
 
-  const TargetRegisterClass* getRegClassForType(const Type* Ty) const;
+  void eliminateCallFramePseudoInstr(MachineFunction &MF,
+                                     MachineBasicBlock &MBB,
+                                     MachineBasicBlock::iterator MI) const;
 
-  unsigned getNumRegClasses() const;
+  void eliminateFrameIndex(MachineBasicBlock::iterator MI) const;
 
+  void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
+
+  void emitPrologue(MachineFunction &MF) const;
+  void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
+
+  // Debug information queries.
+  unsigned getRARegister() const;
+  unsigned getFrameRegister(MachineFunction &MF) const;
 };
 
+// getX86SubSuperRegister - X86 utility function. It returns the sub or super
+// register of a specific X86 register.
+// e.g. getX86SubSuperRegister(X86::EAX, MVT::i16) return X86:AX
+unsigned getX86SubSuperRegister(unsigned, MVT::ValueType, bool High=false);
+
+} // End llvm namespace
+
 #endif