-//===---- X86Subtarget.h - Define Subtarget for the X86 --------*- C++ -*--===//
+//===-- X86Subtarget.h - Define Subtarget for the X86 ----------*- C++ -*--===//
//
// The LLVM Compiler Infrastructure
//
#ifndef X86SUBTARGET_H
#define X86SUBTARGET_H
+#include "llvm/CallingConv.h"
#include "llvm/ADT/Triple.h"
#include "llvm/Target/TargetSubtargetInfo.h"
-#include "llvm/CallingConv.h"
#include <string>
#define GET_SUBTARGETINFO_HEADER
/// HasAES - Target has AES instructions
bool HasAES;
- /// HasCLMUL - Target has carry-less multiplication
- bool HasCLMUL;
+ /// HasPCLMUL - Target has carry-less multiplication
+ bool HasPCLMUL;
- /// HasFMA3 - Target has 3-operand fused multiply-add
- bool HasFMA3;
+ /// HasFMA - Target has 3-operand fused multiply-add
+ bool HasFMA;
/// HasFMA4 - Target has 4-operand fused multiply-add
bool HasFMA4;
bool has3DNowA() const { return X863DNowLevel >= ThreeDNowA; }
bool hasPOPCNT() const { return HasPOPCNT; }
bool hasAES() const { return HasAES; }
- bool hasCLMUL() const { return HasCLMUL; }
- bool hasFMA3() const { return HasFMA3; }
+ bool hasPCLMUL() const { return HasPCLMUL; }
+ bool hasFMA() const { return HasFMA; }
bool hasFMA4() const { return HasFMA4; }
bool hasXOP() const { return HasXOP; }
bool hasMOVBE() const { return HasMOVBE; }
TargetSubtargetInfo::AntiDepBreakMode& Mode,
RegClassVector& CriticalPathRCs) const;
+ bool postRAScheduler() const { return PostRAScheduler; }
+
/// getInstrItins = Return the instruction itineraries based on the
/// subtarget selection.
const InstrItineraryData &getInstrItineraryData() const { return InstrItins; }