//
// The LLVM Compiler Infrastructure
//
-// This file was developed by Nate Begeman and is distributed under the
-// University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
#define X86SUBTARGET_H
#include "llvm/Target/TargetSubtarget.h"
-
#include <string>
namespace llvm {
class GlobalValue;
class TargetMachine;
-namespace PICStyle {
+/// PICStyles - The X86 backend supports a number of different styles of PIC.
+///
+namespace PICStyles {
enum Style {
- Stub, GOT, RIPRel, WinPIC, None
+ Stub, // Used on i386-darwin
+ GOT, // Used on many 32-bit unices.
+ RIPRel, // Used on X86-64 when not in -static mode.
+ None // Set when in -static mode (not PIC or DynamicNoPIC mode).
};
}
};
protected:
enum X86SSEEnum {
- NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3
+ NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42
};
enum X863DNowEnum {
/// PICStyle - Which PIC style to use
///
- PICStyle::Style PICStyle;
+ PICStyles::Style PICStyle;
- /// X86SSELevel - MMX, SSE1, SSE2, SSE3, SSSE3, or none supported.
- ///
+ /// X86SSELevel - MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, or
+ /// none supported.
X86SSEEnum X86SSELevel;
/// X863DNowLevel - 3DNow or 3DNow Athlon, or none supported.
///
bool HasX86_64;
+ /// HasSSE4A - True if the processor supports SSE4A instructions.
+ bool HasSSE4A;
+
+ /// HasAVX - Target has AVX instructions
+ bool HasAVX;
+
+ /// HasFMA3 - Target has 3-operand fused multiply-add
+ bool HasFMA3;
+
+ /// HasFMA4 - Target has 4-operand fused multiply-add
+ bool HasFMA4;
+
+ /// IsBTMemSlow - True if BT (bit test) of memory instructions are slow.
+ bool IsBTMemSlow;
+
+ /// DarwinVers - Nonzero if this is a darwin platform: the numeric
+ /// version of the platform, e.g. 8 = 10.4 (Tiger), 9 = 10.5 (Leopard), etc.
+ unsigned char DarwinVers; // Is any darwin-x86 platform.
+
+ /// isLinux - true if this is a "linux" platform.
+ bool IsLinux;
+
/// stackAlignment - The minimum alignment known to hold of the stack frame on
/// entry to the function and which must be maintained by every function.
unsigned stackAlignment;
/// pointer size is 64 bit.
bool Is64Bit;
- /// HasLow4GUserAddress - True if the low 4G user-space address is available.
- ///
- bool HasLow4GUserAddress;
-
public:
enum {
isELF, isCygwin, isDarwin, isWindows, isMingw
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
- void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
+ std::string ParseSubtargetFeatures(const std::string &FS,
+ const std::string &CPU);
/// AutoDetectSubtargetFeatures - Auto-detect CPU features using CPUID
/// instruction.
bool is64Bit() const { return Is64Bit; }
- /// hasLow4GUserSpaceAddress - True if lower 4G user-space address is
- /// available.
- bool hasLow4GUserSpaceAddress() const { return HasLow4GUserAddress; }
-
- PICStyle::Style getPICStyle() const { return PICStyle; }
- void setPICStyle(PICStyle::Style Style) { PICStyle = Style; }
+ PICStyles::Style getPICStyle() const { return PICStyle; }
+ void setPICStyle(PICStyles::Style Style) { PICStyle = Style; }
bool hasMMX() const { return X86SSELevel >= MMX; }
bool hasSSE1() const { return X86SSELevel >= SSE1; }
bool hasSSE2() const { return X86SSELevel >= SSE2; }
bool hasSSE3() const { return X86SSELevel >= SSE3; }
bool hasSSSE3() const { return X86SSELevel >= SSSE3; }
+ bool hasSSE41() const { return X86SSELevel >= SSE41; }
+ bool hasSSE42() const { return X86SSELevel >= SSE42; }
+ bool hasSSE4A() const { return HasSSE4A; }
bool has3DNow() const { return X863DNowLevel >= ThreeDNow; }
bool has3DNowA() const { return X863DNowLevel >= ThreeDNowA; }
+ bool hasAVX() const { return HasAVX; }
+ bool hasFMA3() const { return HasFMA3; }
+ bool hasFMA4() const { return HasFMA4; }
+
+ bool isBTMemSlow() const { return IsBTMemSlow; }
unsigned getAsmFlavor() const {
return AsmFlavor != Unset ? unsigned(AsmFlavor) : 0;
bool isFlavorIntel() const { return AsmFlavor == Intel; }
bool isTargetDarwin() const { return TargetType == isDarwin; }
- bool isTargetELF() const { return TargetType == isELF; }
+ bool isTargetELF() const {
+ return TargetType == isELF;
+ }
bool isTargetWindows() const { return TargetType == isWindows; }
bool isTargetMingw() const { return TargetType == isMingw; }
bool isTargetCygMing() const { return (TargetType == isMingw ||
TargetType == isCygwin); }
bool isTargetCygwin() const { return TargetType == isCygwin; }
+ bool isTargetWin64() const {
+ return (Is64Bit && (TargetType == isMingw || TargetType == isWindows));
+ }
std::string getDataLayout() const {
const char *p;
return std::string(p);
}
- bool isPICStyleSet() const { return PICStyle != PICStyle::None; }
- bool isPICStyleGOT() const { return PICStyle == PICStyle::GOT; }
- bool isPICStyleStub() const { return PICStyle == PICStyle::Stub; }
- bool isPICStyleRIPRel() const { return PICStyle == PICStyle::RIPRel; }
- bool isPICStyleWinPIC() const { return PICStyle == PICStyle:: WinPIC; }
-
+ bool isPICStyleSet() const { return PICStyle != PICStyles::None; }
+ bool isPICStyleGOT() const { return PICStyle == PICStyles::GOT; }
+ bool isPICStyleStub() const { return PICStyle == PICStyles::Stub; }
+ bool isPICStyleRIPRel() const { return PICStyle == PICStyles::RIPRel; }
+
+ /// getDarwinVers - Return the darwin version number, 8 = tiger, 9 = leopard.
+ unsigned getDarwinVers() const { return DarwinVers; }
+
+ /// isLinux - Return true if the target is "Linux".
+ bool isLinux() const { return IsLinux; }
+
/// True if accessing the GV requires an extra load. For Windows, dllimported
/// symbols are indirect, loading the value at address GV rather then the
/// value of GV itself. This means that the GlobalAddress must be in the base
bool GVRequiresExtraLoad(const GlobalValue* GV, const TargetMachine& TM,
bool isDirectCall) const;
+ /// True if accessing the GV requires a register. This is a superset of the
+ /// cases where GVRequiresExtraLoad is true. Some variations of PIC require
+ /// a register, but not an extra load.
+ bool GVRequiresRegister(const GlobalValue* GV, const TargetMachine& TM,
+ bool isDirectCall) const;
+
+ /// IsLegalToCallImmediateAddr - Return true if the subtarget allows calls
+ /// to immediate address.
+ bool IsLegalToCallImmediateAddr(const TargetMachine &TM) const;
+
+ /// This function returns the name of a function which has an interface
+ /// like the non-standard bzero function, if such a function exists on
+ /// the current subtarget and it is considered prefereable over
+ /// memset with zero passed as the second argument. Otherwise it
+ /// returns null.
+ const char *getBZeroEntry() const;
+
+ /// getSpecialAddressLatency - For targets where it is beneficial to
+ /// backschedule instructions that compute addresses, return a value
+ /// indicating the number of scheduling cycles of backscheduling that
+ /// should be attempted.
+ unsigned getSpecialAddressLatency() const;
};
namespace X86 {
projects / oota-llvm.git / blobdiff