Turn off the old way of handling debug information in the code generator. Use

[oota-llvm.git] / lib / Target / X86 / X86TargetAsmInfo.cpp

diff --git a/lib/Target/X86/X86TargetAsmInfo.cpp b/lib/Target/X86/X86TargetAsmInfo.cpp
index abb05260cbac6e0243158ada3d1ba0495b744868..226feb7c1e6c0dc3c0feb6651da2bb4f05cb1377 100644 (file)
--- a/lib/Target/X86/X86TargetAsmInfo.cpp
+++ b/lib/Target/X86/X86TargetAsmInfo.cpp
@@ -69,6 +69,8 @@ X86DarwinTargetAsmInfo::X86DarwinTargetAsmInfo(const X86TargetMachine &TM):
   // Leopard and above support aligned common symbols.
   COMMDirectiveTakesAlignment = (Subtarget->getDarwinVers() >= 9);
   HasDotTypeDotSizeDirective = false;
+  HasSingleParameterDotFile = false;
+  NonLocalEHFrameLabel = true;
   if (TM.getRelocationModel() == Reloc::Static) {
     StaticCtorsSection = ".constructor";
     StaticDtorsSection = ".destructor";
@@ -137,6 +139,16 @@ X86DarwinTargetAsmInfo::PreferredEHDataFormat(DwarfEncoding::Target Reason,
     return DW_EH_PE_absptr;
 }
 
+const char *
+X86DarwinTargetAsmInfo::getEHGlobalPrefix() const
+{
+  const X86Subtarget* Subtarget = &TM.getSubtarget<X86Subtarget>();
+  if (Subtarget->getDarwinVers() > 9)
+    return PrivateGlobalPrefix;
+  else
+    return "";
+}
+
 X86ELFTargetAsmInfo::X86ELFTargetAsmInfo(const X86TargetMachine &TM):
   X86TargetAsmInfo<ELFTargetAsmInfo>(TM) {
 
@@ -221,6 +233,7 @@ X86COFFTargetAsmInfo::X86COFFTargetAsmInfo(const X86TargetMachine &TM):
   LCOMMDirective = "\t.lcomm\t";
   COMMDirectiveTakesAlignment = false;
   HasDotTypeDotSizeDirective = false;
+  HasSingleParameterDotFile = false;
   StaticCtorsSection = "\t.section .ctors,\"aw\"";
   StaticDtorsSection = "\t.section .dtors,\"aw\"";
   HiddenDirective = NULL;
@@ -304,6 +317,7 @@ X86COFFTargetAsmInfo::UniqueSectionForGlobal(const GlobalValue* GV,
    default:
     assert(0 && "Unknown section kind");
   }
+  return NULL;
 }
 
 std::string X86COFFTargetAsmInfo::printSectionFlags(unsigned flags) const {
@@ -335,6 +349,7 @@ X86WinTargetAsmInfo::X86WinTargetAsmInfo(const X86TargetMachine &TM):
   Data32bitsDirective = "\tdd\t";
   Data64bitsDirective = "\tdq\t";
   HasDotTypeDotSizeDirective = false;
+  HasSingleParameterDotFile = false;
 
   TextSection = getUnnamedSection("_text", SectionFlags::Code);
   DataSection = getUnnamedSection("_data", SectionFlags::Writeable);
@@ -396,11 +411,21 @@ bool X86TargetAsmInfo<BaseTAI>::ExpandInlineAsm(CallInst *CI) const {
 
     // bswap $0
     if (AsmPieces.size() == 2 &&
-        AsmPieces[0] == "bswap" && AsmPieces[1] == "$0") {
+        AsmPieces[0] == "bswap" && (AsmPieces[1] == "$0" ||
+                                    AsmPieces[1] == "${0:q}")) {
       // No need to check constraints, nothing other than the equivalent of
       // "=r,0" would be valid here.
       return LowerToBSwap(CI);
     }
+    // rorw $$8, ${0:w}  -->  llvm.bswap.i16
+    if (CI->getType() == Type::Int16Ty &&
+        AsmPieces.size() == 3 &&
+        AsmPieces[0] == "rorw" &&
+        AsmPieces[1] == "$$8," &&
+        AsmPieces[2] == "${0:w}" &&
+        IA->getConstraintString() == "=r,0,~{dirflag},~{fpsr},~{flags},~{cc}") {
+      return LowerToBSwap(CI);
+    }
     break;
   case 3:
     if (CI->getType() == Type::Int64Ty && Constraints.size() >= 2 &&