}
if (Subtarget.isTargetCygMing())
- Subtarget.setPICStyle(PICStyle::WinPIC);
+ Subtarget.setPICStyle(PICStyles::WinPIC);
else if (Subtarget.isTargetDarwin()) {
if (Subtarget.is64Bit())
- Subtarget.setPICStyle(PICStyle::RIPRel);
+ Subtarget.setPICStyle(PICStyles::RIPRel);
else
- Subtarget.setPICStyle(PICStyle::Stub);
+ Subtarget.setPICStyle(PICStyles::Stub);
} else if (Subtarget.isTargetELF()) {
if (Subtarget.is64Bit())
- Subtarget.setPICStyle(PICStyle::RIPRel);
+ Subtarget.setPICStyle(PICStyles::RIPRel);
else
- Subtarget.setPICStyle(PICStyle::GOT);
+ Subtarget.setPICStyle(PICStyles::GOT);
}
}
bool X86TargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
// Install an instruction selector.
PM.add(createX86ISelDag(*this, Fast));
+
+ // If we're using Fast-ISel, clean up the mess.
+ if (EnableFastISel)
+ PM.add(createDeadMachineInstructionElimPass());
+
+ // Install a pass to insert x87 FP_REG_KILL instructions, as needed.
+ PM.add(createX87FPRegKillInserterPass());
+
return false;
}
return false;
}
-// symbolicAddressesAreRIPRel - Return true if symbolic addresses are
-// RIP-relative on this machine, taking into consideration the relocation
-// model and subtarget. RIP-relative addresses cannot have a separate
-// base or index register.
+/// symbolicAddressesAreRIPRel - Return true if symbolic addresses are
+/// RIP-relative on this machine, taking into consideration the relocation
+/// model and subtarget. RIP-relative addresses cannot have a separate
+/// base or index register.
bool X86TargetMachine::symbolicAddressesAreRIPRel() const {
return getRelocationModel() != Reloc::Static &&
Subtarget.isPICStyleRIPRel();