#include "llvm/PassManager.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/Passes.h"
+#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetMachineRegistry.h"
using namespace llvm;
// Register the target.
static RegisterTarget<X86_32TargetMachine>
-X("x86", " 32-bit X86: Pentium-Pro and above");
+X("x86", "32-bit X86: Pentium-Pro and above");
static RegisterTarget<X86_64TargetMachine>
-Y("x86-64", " 64-bit X86: EM64T and AMD64");
+Y("x86-64", "64-bit X86: EM64T and AMD64");
+
+// No assembler printer by default
+X86TargetMachine::AsmPrinterCtorFn X86TargetMachine::AsmPrinterCtor = 0;
const TargetAsmInfo *X86TargetMachine::createTargetAsmInfo() const {
if (Subtarget.isFlavorIntel())
case X86Subtarget::isWindows:
return new X86WinTargetAsmInfo(*this);
default:
- return new X86TargetAsmInfo(*this);
+ return new X86GenericTargetAsmInfo(*this);
}
}
else
setRelocationModel(Reloc::Static);
}
+
+ // ELF doesn't have a distinct dynamic-no-PIC model. Dynamic-no-PIC
+ // is defined as a model for code which may be used in static or
+ // dynamic executables but not necessarily a shared library. On ELF
+ // implement this by using the Static model.
+ if (Subtarget.isTargetELF() &&
+ getRelocationModel() == Reloc::DynamicNoPIC)
+ setRelocationModel(Reloc::Static);
+
if (Subtarget.is64Bit()) {
// No DynamicNoPIC support under X86-64.
if (getRelocationModel() == Reloc::DynamicNoPIC)
}
if (Subtarget.isTargetCygMing())
- Subtarget.setPICStyle(PICStyle::WinPIC);
+ Subtarget.setPICStyle(PICStyles::WinPIC);
else if (Subtarget.isTargetDarwin()) {
if (Subtarget.is64Bit())
- Subtarget.setPICStyle(PICStyle::RIPRel);
+ Subtarget.setPICStyle(PICStyles::RIPRel);
else
- Subtarget.setPICStyle(PICStyle::Stub);
+ Subtarget.setPICStyle(PICStyles::Stub);
} else if (Subtarget.isTargetELF()) {
if (Subtarget.is64Bit())
- Subtarget.setPICStyle(PICStyle::RIPRel);
+ Subtarget.setPICStyle(PICStyles::RIPRel);
else
- Subtarget.setPICStyle(PICStyle::GOT);
+ Subtarget.setPICStyle(PICStyles::GOT);
}
}
bool X86TargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
// Install an instruction selector.
PM.add(createX86ISelDag(*this, Fast));
+
+ // If we're using Fast-ISel, clean up the mess.
+ if (EnableFastISel)
+ PM.add(createDeadMachineInstructionElimPass());
+
+ // Install a pass to insert x87 FP_REG_KILL instructions, as needed.
+ PM.add(createX87FPRegKillInserterPass());
+
return false;
}
}
bool X86TargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
- std::ostream &Out) {
- PM.add(createX86CodePrinterPass(Out, *this));
+ raw_ostream &Out) {
+ assert(AsmPrinterCtor && "AsmPrinter was not linked in");
+ if (AsmPrinterCtor)
+ PM.add(AsmPrinterCtor(Out, *this));
return false;
}
}
PM.add(createX86CodeEmitterPass(*this, MCE));
- if (DumpAsm)
- PM.add(createX86CodePrinterPass(*cerr.stream(), *this));
+ if (DumpAsm) {
+ assert(AsmPrinterCtor && "AsmPrinter was not linked in");
+ if (AsmPrinterCtor)
+ PM.add(AsmPrinterCtor(errs(), *this));
+ }
return false;
}
bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE) {
PM.add(createX86CodeEmitterPass(*this, MCE));
- if (DumpAsm)
- PM.add(createX86CodePrinterPass(*cerr.stream(), *this));
+ if (DumpAsm) {
+ assert(AsmPrinterCtor && "AsmPrinter was not linked in");
+ if (AsmPrinterCtor)
+ PM.add(AsmPrinterCtor(errs(), *this));
+ }
+
return false;
}
+
+/// symbolicAddressesAreRIPRel - Return true if symbolic addresses are
+/// RIP-relative on this machine, taking into consideration the relocation
+/// model and subtarget. RIP-relative addresses cannot have a separate
+/// base or index register.
+bool X86TargetMachine::symbolicAddressesAreRIPRel() const {
+ return getRelocationModel() != Reloc::Static &&
+ Subtarget.isPICStyleRIPRel();
+}