Use isNull instead of getNode() to test for existence of a node, this is cheaper.

[oota-llvm.git] / lib / Target / X86 / X86TargetMachine.cpp

diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp
index fba8e8dc9eacf9a543e1e80a723fa1f4dcdf5dfb..83a390edaf8f137e40922189f628dcbcf639021e 100644 (file)
--- a/lib/Target/X86/X86TargetMachine.cpp
+++ b/lib/Target/X86/X86TargetMachine.cpp
@@ -13,6 +13,7 @@
 
 #include "X86TargetMachine.h"
 #include "X86.h"
+#include "llvm/IntrinsicLowering.h"
 #include "llvm/Module.h"
 #include "llvm/PassManager.h"
 #include "llvm/Target/TargetMachineImpls.h"
@@ -21,8 +22,7 @@
 #include "llvm/Transforms/Scalar.h"
 #include "Support/CommandLine.h"
 #include "Support/Statistic.h"
-
-namespace llvm {
+using namespace llvm;
 
 namespace {
   cl::opt<bool> PrintCode("print-machineinstrs",
@@ -30,22 +30,28 @@ namespace {
   cl::opt<bool> NoPatternISel("disable-pattern-isel", cl::init(true),
                         cl::desc("Use the 'simple' X86 instruction selector"));
   cl::opt<bool> NoSSAPeephole("disable-ssa-peephole", cl::init(true),
-                        cl::desc("Disable the ssa-based peephole optimizer (defaults to disabled)"));
+                        cl::desc("Disable the ssa-based peephole optimizer "
+                                 "(defaults to disabled)"));
+  cl::opt<bool> DisableOutput("disable-x86-llc-output", cl::Hidden,
+                              cl::desc("Disable the X86 asm printer, for use "
+                                       "when profiling the code generator."));
 }
 
 // allocateX86TargetMachine - Allocate and return a subclass of TargetMachine
 // that implements the X86 backend.
 //
-TargetMachine *allocateX86TargetMachine(const Module &M) {
-  return new X86TargetMachine(M);
+TargetMachine *llvm::allocateX86TargetMachine(const Module &M,
+                                              IntrinsicLowering *IL) {
+  return new X86TargetMachine(M, IL);
 }
 
 
 /// X86TargetMachine ctor - Create an ILP32 architecture model
 ///
-X86TargetMachine::X86TargetMachine(const Module &M)
-  : TargetMachine("X86", true, 4, 4, 4, 4, 4),
-    FrameInfo(TargetFrameInfo::StackGrowsDown, 8/*16 for SSE*/, 4) {
+X86TargetMachine::X86TargetMachine(const Module &M, IntrinsicLowering *IL)
+  : TargetMachine("X86", IL, true, 4, 4, 4, 4, 4),
+    FrameInfo(TargetFrameInfo::StackGrowsDown, 8/*16 for SSE*/, 4),
+    JITInfo(*this) {
 }
 
 
@@ -74,23 +80,18 @@ bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM,
 
   // Print the instruction selected machine code...
   if (PrintCode)
-    PM.add(createMachineFunctionPrinterPass());
-
-  // kill floating point registers at the end of basic blocks. this is
-  // done because the floating point register stackifier cannot handle
-  // floating point regs that are live across basic blocks.
-  PM.add(createX86FloatingPointKillerPass());
+    PM.add(createMachineFunctionPrinterPass(&std::cerr));
 
   // Perform register allocation to convert to a concrete x86 representation
   PM.add(createRegisterAllocator());
 
   if (PrintCode)
-    PM.add(createMachineFunctionPrinterPass());
+    PM.add(createMachineFunctionPrinterPass(&std::cerr));
 
   PM.add(createX86FloatingPointStackifierPass());
 
   if (PrintCode)
-    PM.add(createMachineFunctionPrinterPass());
+    PM.add(createMachineFunctionPrinterPass(&std::cerr));
 
   // Insert prolog/epilog code.  Eliminate abstract frame index references...
   PM.add(createPrologEpilogCodeInserter());
@@ -100,7 +101,12 @@ bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM,
   if (PrintCode)  // Print the register-allocated code
     PM.add(createX86CodePrinterPass(std::cerr, *this));
 
-  PM.add(createX86CodePrinterPass(Out, *this));
+  if (!DisableOutput)
+    PM.add(createX86CodePrinterPass(Out, *this));
+
+  // Delete machine code for this function
+  PM.add(createMachineCodeDeleter());
+
   return false; // success!
 }
 
@@ -108,7 +114,7 @@ bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM,
 /// implement a fast dynamic compiler for this target.  Return true if this is
 /// not supported for this target.
 ///
-bool X86TargetMachine::addPassesToJITCompile(FunctionPassManager &PM) {
+void X86JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
   // FIXME: Implement the switch instruction in the instruction selector!
   PM.add(createLowerSwitchPass());
 
@@ -120,9 +126,9 @@ bool X86TargetMachine::addPassesToJITCompile(FunctionPassManager &PM) {
   PM.add(createCFGSimplificationPass());
 
   if (NoPatternISel)
-    PM.add(createX86SimpleInstructionSelector(*this));
+    PM.add(createX86SimpleInstructionSelector(TM));
   else
-    PM.add(createX86PatternInstructionSelector(*this));
+    PM.add(createX86PatternInstructionSelector(TM));
 
   // Run optional SSA-based machine code optimizations next...
   if (!NoSSAPeephole)
@@ -132,23 +138,18 @@ bool X86TargetMachine::addPassesToJITCompile(FunctionPassManager &PM) {
 
   // Print the instruction selected machine code...
   if (PrintCode)
-    PM.add(createMachineFunctionPrinterPass());
-
-  // kill floating point registers at the end of basic blocks. this is
-  // done because the floating point register stackifier cannot handle
-  // floating point regs that are live across basic blocks.
-  PM.add(createX86FloatingPointKillerPass());
+    PM.add(createMachineFunctionPrinterPass(&std::cerr));
 
   // Perform register allocation to convert to a concrete x86 representation
   PM.add(createRegisterAllocator());
 
   if (PrintCode)
-    PM.add(createMachineFunctionPrinterPass());
+    PM.add(createMachineFunctionPrinterPass(&std::cerr));
 
   PM.add(createX86FloatingPointStackifierPass());
 
   if (PrintCode)
-    PM.add(createMachineFunctionPrinterPass());
+    PM.add(createMachineFunctionPrinterPass(&std::cerr));
 
   // Insert prolog/epilog code.  Eliminate abstract frame index references...
   PM.add(createPrologEpilogCodeInserter());
@@ -156,18 +157,6 @@ bool X86TargetMachine::addPassesToJITCompile(FunctionPassManager &PM) {
   PM.add(createX86PeepholeOptimizerPass());
 
   if (PrintCode)  // Print the register-allocated code
-    PM.add(createX86CodePrinterPass(std::cerr, *this));
-  return false; // success!
-}
-
-void X86TargetMachine::replaceMachineCodeForFunction (void *Old, void *New) {
-  // FIXME: This code could perhaps live in a more appropriate place.
-  char *OldByte = (char *) Old;
-  *OldByte++ = 0xE9;                // Emit JMP opcode.
-  int32_t *OldWord = (int32_t *) OldByte;
-  int32_t NewAddr = (intptr_t) New;
-  int32_t OldAddr = (intptr_t) OldWord;
-  *OldWord = NewAddr - OldAddr - 4; // Emit PC-relative addr of New code.
+    PM.add(createX86CodePrinterPass(std::cerr, TM));
 }
 
-} // End llvm namespace