-no-implicit-float means explicit fp operations are legal.

[oota-llvm.git] / lib / Target / X86 / X86TargetMachine.cpp

diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp
index 7e597851fcec8054d38ded4a9eb50c1e6f1cd696..a20e1c448968c3cf2d0ae7460e57fca98e9c48b7 100644 (file)
--- a/lib/Target/X86/X86TargetMachine.cpp
+++ b/lib/Target/X86/X86TargetMachine.cpp
@@ -18,6 +18,7 @@
 #include "llvm/PassManager.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/Passes.h"
+#include "llvm/Support/raw_ostream.h"
 #include "llvm/Target/TargetOptions.h"
 #include "llvm/Target/TargetMachineRegistry.h"
 using namespace llvm;
@@ -31,12 +32,30 @@ int X86TargetMachineModule = 0;
 
 // Register the target.
 static RegisterTarget<X86_32TargetMachine>
-X("x86",    "  32-bit X86: Pentium-Pro and above");
+X("x86",    "32-bit X86: Pentium-Pro and above");
 static RegisterTarget<X86_64TargetMachine>
-Y("x86-64", "  64-bit X86: EM64T and AMD64");
+Y("x86-64", "64-bit X86: EM64T and AMD64");
+
+// No assembler printer by default
+X86TargetMachine::AsmPrinterCtorFn X86TargetMachine::AsmPrinterCtor = 0;
 
 const TargetAsmInfo *X86TargetMachine::createTargetAsmInfo() const {
-  return new X86TargetAsmInfo(*this);
+  if (Subtarget.isFlavorIntel())
+    return new X86WinTargetAsmInfo(*this);
+  else
+    switch (Subtarget.TargetType) {
+     case X86Subtarget::isDarwin:
+      return new X86DarwinTargetAsmInfo(*this);
+     case X86Subtarget::isELF:
+      return new X86ELFTargetAsmInfo(*this);
+     case X86Subtarget::isMingw:
+     case X86Subtarget::isCygwin:
+      return new X86COFFTargetAsmInfo(*this);
+     case X86Subtarget::isWindows:
+      return new X86WinTargetAsmInfo(*this);
+     default:
+      return new X86GenericTargetAsmInfo(*this);
+    }
 }
 
 unsigned X86_32TargetMachine::getJITMatchQuality() {
@@ -124,6 +143,15 @@ X86TargetMachine::X86TargetMachine(const Module &M, const std::string &FS,
     else
       setRelocationModel(Reloc::Static);
   }
+
+  // ELF doesn't have a distinct dynamic-no-PIC model. Dynamic-no-PIC
+  // is defined as a model for code which may be used in static or
+  // dynamic executables but not necessarily a shared library. On ELF
+  // implement this by using the Static model.
+  if (Subtarget.isTargetELF() &&
+      getRelocationModel() == Reloc::DynamicNoPIC)
+    setRelocationModel(Reloc::Static);
+
   if (Subtarget.is64Bit()) {
     // No DynamicNoPIC support under X86-64.
     if (getRelocationModel() == Reloc::DynamicNoPIC)
@@ -134,17 +162,17 @@ X86TargetMachine::X86TargetMachine(const Module &M, const std::string &FS,
   }
 
   if (Subtarget.isTargetCygMing())
-    Subtarget.setPICStyle(PICStyle::WinPIC);
+    Subtarget.setPICStyle(PICStyles::WinPIC);
   else if (Subtarget.isTargetDarwin()) {
     if (Subtarget.is64Bit())
-      Subtarget.setPICStyle(PICStyle::RIPRel);
+      Subtarget.setPICStyle(PICStyles::RIPRel);
     else
-      Subtarget.setPICStyle(PICStyle::Stub);
+      Subtarget.setPICStyle(PICStyles::Stub);
   } else if (Subtarget.isTargetELF()) {
     if (Subtarget.is64Bit())
-      Subtarget.setPICStyle(PICStyle::RIPRel);
+      Subtarget.setPICStyle(PICStyles::RIPRel);
     else
-      Subtarget.setPICStyle(PICStyle::GOT);
+      Subtarget.setPICStyle(PICStyles::GOT);
   }
 }
 
@@ -155,6 +183,14 @@ X86TargetMachine::X86TargetMachine(const Module &M, const std::string &FS,
 bool X86TargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
   // Install an instruction selector.
   PM.add(createX86ISelDag(*this, Fast));
+
+  // If we're using Fast-ISel, clean up the mess.
+  if (EnableFastISel)
+    PM.add(createDeadMachineInstructionElimPass());
+
+  // Install a pass to insert x87 FP_REG_KILL instructions, as needed.
+  PM.add(createX87FPRegKillInserterPass());
+
   return false;
 }
 
@@ -171,24 +207,37 @@ bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM, bool Fast) {
 }
 
 bool X86TargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast, 
-                                          std::ostream &Out) {
-  PM.add(createX86CodePrinterPass(Out, *this));
+                                          bool Verbose, raw_ostream &Out) {
+  assert(AsmPrinterCtor && "AsmPrinter was not linked in");
+  if (AsmPrinterCtor)
+    PM.add(AsmPrinterCtor(Out, *this, Fast, Verbose));
   return false;
 }
 
 bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
                                       bool DumpAsm, MachineCodeEmitter &MCE) {
   // FIXME: Move this to TargetJITInfo!
-  if (DefRelocModel == Reloc::Default)
+  // On Darwin, do not override 64-bit setting made in X86TargetMachine().
+  if (DefRelocModel == Reloc::Default && 
+        (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit()))
     setRelocationModel(Reloc::Static);
   
-  // JIT cannot ensure globals are placed in the lower 4G of address.
-  if (Subtarget.is64Bit())
-    setCodeModel(CodeModel::Large);
+  // 64-bit JIT places everything in the same buffer except external functions.
+  // On Darwin, use small code model but hack the call instruction for 
+  // externals.  Elsewhere, do not assume globals are in the lower 4G.
+  if (Subtarget.is64Bit()) {
+    if (Subtarget.isTargetDarwin())
+      setCodeModel(CodeModel::Small);
+    else
+      setCodeModel(CodeModel::Large);
+  }
 
   PM.add(createX86CodeEmitterPass(*this, MCE));
-  if (DumpAsm)
-    PM.add(createX86CodePrinterPass(*cerr.stream(), *this));
+  if (DumpAsm) {
+    assert(AsmPrinterCtor && "AsmPrinter was not linked in");
+    if (AsmPrinterCtor)
+      PM.add(AsmPrinterCtor(errs(), *this, Fast, true));
+  }
 
   return false;
 }
@@ -196,7 +245,20 @@ bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
 bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
                                         bool DumpAsm, MachineCodeEmitter &MCE) {
   PM.add(createX86CodeEmitterPass(*this, MCE));
-  if (DumpAsm)
-    PM.add(createX86CodePrinterPass(*cerr.stream(), *this));
+  if (DumpAsm) {
+    assert(AsmPrinterCtor && "AsmPrinter was not linked in");
+    if (AsmPrinterCtor)
+      PM.add(AsmPrinterCtor(errs(), *this, Fast, true));
+  }
+
   return false;
 }
+
+/// symbolicAddressesAreRIPRel - Return true if symbolic addresses are
+/// RIP-relative on this machine, taking into consideration the relocation
+/// model and subtarget. RIP-relative addresses cannot have a separate
+/// base or index register.
+bool X86TargetMachine::symbolicAddressesAreRIPRel() const {
+  return getRelocationModel() != Reloc::Static &&
+         Subtarget.isPICStyleRIPRel();
+}