R600/SI: Merge offset0 and offset1 fields for single address DS instructions v2

[oota-llvm.git] / lib / Target / X86 / X86TargetMachine.h

diff --git a/lib/Target/X86/X86TargetMachine.h b/lib/Target/X86/X86TargetMachine.h
index 717fdee0011c960986fe27656e1d7838a026310d..eca8cba9be8bd074da84510c30bbf17c0277aadb 100644 (file)
--- a/lib/Target/X86/X86TargetMachine.h
+++ b/lib/Target/X86/X86TargetMachine.h
@@ -1,12 +1,12 @@
 //===-- X86TargetMachine.h - Define TargetMachine for the X86 ---*- C++ -*-===//
-// 
+//
 //                     The LLVM Compiler Infrastructure
 //
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
-// 
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
 //===----------------------------------------------------------------------===//
-// 
+//
 // This file declares the X86 specific subclass of TargetMachine.
 //
 //===----------------------------------------------------------------------===//
@@ -14,50 +14,68 @@
 #ifndef X86TARGETMACHINE_H
 #define X86TARGETMACHINE_H
 
-#include "llvm/Target/TargetMachine.h"
-#include "llvm/Target/TargetFrameInfo.h"
-#include "llvm/PassManager.h"
+#include "X86FrameLowering.h"
+#include "X86ISelLowering.h"
 #include "X86InstrInfo.h"
 #include "X86JITInfo.h"
+#include "X86SelectionDAGInfo.h"
+#include "X86Subtarget.h"
+#include "llvm/IR/DataLayout.h"
+#include "llvm/Target/TargetMachine.h"
 
 namespace llvm {
-class IntrinsicLowering;
 
-class X86TargetMachine : public TargetMachine {
-  X86InstrInfo    InstrInfo;
-  TargetFrameInfo FrameInfo;
-  X86JITInfo      JITInfo;
+class StringRef;
+
+class X86TargetMachine : public LLVMTargetMachine {
+  virtual void anchor();
+  X86Subtarget       Subtarget;
+  X86FrameLowering   FrameLowering;
+  InstrItineraryData InstrItins;
+  const DataLayout   DL; // Calculates type size & alignment
+  X86InstrInfo       InstrInfo;
+  X86TargetLowering  TLInfo;
+  X86SelectionDAGInfo TSInfo;
+  X86JITInfo         JITInfo;
+
 public:
-  X86TargetMachine(const Module &M, IntrinsicLowering *IL);
+  X86TargetMachine(const Target &T, StringRef TT,
+                   StringRef CPU, StringRef FS, const TargetOptions &Options,
+                   Reloc::Model RM, CodeModel::Model CM,
+                   CodeGenOpt::Level OL);
 
-  virtual const X86InstrInfo     *getInstrInfo() const { return &InstrInfo; }
-  virtual const TargetFrameInfo  *getFrameInfo() const { return &FrameInfo; }
-  virtual       TargetJITInfo    *getJITInfo()         { return &JITInfo; }
-  virtual const MRegisterInfo    *getRegisterInfo() const {
-    return &InstrInfo.getRegisterInfo();
+  const DataLayout *getDataLayout() const override { return &DL; }
+  const X86InstrInfo *getInstrInfo() const override {
+    return &InstrInfo;
+  }
+  const TargetFrameLowering *getFrameLowering() const override {
+    return &FrameLowering;
+  }
+  X86JITInfo *getJITInfo() override {
+    return &JITInfo;
+  }
+  const X86Subtarget *getSubtargetImpl() const override { return &Subtarget; }
+  const X86TargetLowering *getTargetLowering() const override {
+    return &TLInfo;
+  }
+  const X86SelectionDAGInfo *getSelectionDAGInfo() const override {
+    return &TSInfo;
+  }
+  const X86RegisterInfo  *getRegisterInfo() const override {
+    return &getInstrInfo()->getRegisterInfo();
+  }
+  const InstrItineraryData *getInstrItineraryData() const override {
+    return &InstrItins;
   }
 
-  /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
-  /// get machine code emitted.  This uses a MachineCodeEmitter object to handle
-  /// actually outputting the machine code and resolving things like the address
-  /// of functions.  This method should returns true if machine code emission is
-  /// not supported.
-  ///
-  virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM,
-                                          MachineCodeEmitter &MCE);
-  
-  virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out);
+  /// \brief Register X86 analysis passes with a pass manager.
+  void addAnalysisPasses(PassManagerBase &PM) override;
 
-  static unsigned getModuleMatchQuality(const Module &M);
-  static unsigned getJITMatchQuality();
-};
+  // Set up the pass pipeline.
+  TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
 
-  // this is implemented in X86CodeEmitter.cpp
-  namespace X86 {
-    void emitInstruction(MachineCodeEmitter& mce,
-                         const X86InstrInfo& ii,
-                         const MachineInstr& MI);
-  }
+  bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &JCE) override;
+};
 
 } // End llvm namespace