PrologEpilogInserter: Rewrite API to determine callee save regsiters.

[oota-llvm.git] / lib / Target / XCore / LLVMBuild.txt

diff --git a/lib/Target/XCore/LLVMBuild.txt b/lib/Target/XCore/LLVMBuild.txt
index 1f7e2d5d0a324c47b617740dd15a44081bdf8f93..401e0526f5806d6933568cfd87acedd293255235 100644 (file)
--- a/lib/Target/XCore/LLVMBuild.txt
+++ b/lib/Target/XCore/LLVMBuild.txt
@@ -15,16 +15,31 @@
 ;
 ;===------------------------------------------------------------------------===;
 
+[common]
+subdirectories = Disassembler InstPrinter MCTargetDesc TargetInfo
+
 [component_0]
 type = TargetGroup
 name = XCore
 parent = Target
 has_asmprinter = 1
+has_disassembler = 1
 
 [component_1]
 type = Library
 name = XCoreCodeGen
 parent = XCore
-required_libraries = AsmPrinter CodeGen Core MC SelectionDAG Support Target XCoreDesc XCoreInfo
+required_libraries =
+ Analysis
+ AsmPrinter
+ CodeGen
+ Core
+ MC
+ SelectionDAG
+ Support
+ Target
+ TransformUtils
+ XCoreAsmPrinter
+ XCoreDesc
+ XCoreInfo
 add_to_library_groups = XCore
-