Change SectionKind to be a property that is true of a *section*, it

[oota-llvm.git] / lib / Target / XCore / XCoreISelLowering.cpp

diff --git a/lib/Target/XCore/XCoreISelLowering.cpp b/lib/Target/XCore/XCoreISelLowering.cpp
index 113bfbf8dbec395182cc51d24fad600a0864d8f9..24d9f9b6bb35b10bbdabba3f8c5bb19169c0e5b1 100644 (file)
--- a/lib/Target/XCore/XCoreISelLowering.cpp
+++ b/lib/Target/XCore/XCoreISelLowering.cpp
@@ -16,6 +16,7 @@
 #include "XCoreISelLowering.h"
 #include "XCoreMachineFunctionInfo.h"
 #include "XCore.h"
+#include "XCoreTargetObjectFile.h"
 #include "XCoreTargetMachine.h"
 #include "XCoreSubtarget.h"
 #include "llvm/DerivedTypes.h"
@@ -33,6 +34,7 @@
 #include "llvm/CodeGen/ValueTypes.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
 #include "llvm/ADT/VectorExtras.h"
 #include <queue>
 #include <set>
@@ -54,7 +56,7 @@ getTargetNodeName(unsigned Opcode) const
 }
 
 XCoreTargetLowering::XCoreTargetLowering(XCoreTargetMachine &XTM)
-  : TargetLowering(XTM),
+  : TargetLowering(XTM, new XCoreTargetObjectFile()),
     TM(XTM),
     Subtarget(*XTM.getSubtargetImpl()) {
 
@@ -68,8 +70,6 @@ XCoreTargetLowering::XCoreTargetLowering(XCoreTargetMachine &XTM)
   setIntDivIsCheap(false);
 
   setShiftAmountType(MVT::i32);
-  // shl X, 32 == 0
-  setShiftAmountFlavor(Extend);
   setStackPointerRegisterToSaveRestore(XCore::SP);
 
   setSchedulingPreference(SchedulingForRegPressure);
@@ -284,8 +284,8 @@ LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG)
   const Type *Ty = cast<PointerType>(GV->getType())->getElementType();
   if (!Ty->isSized() || isZeroLengthArray(Ty)) {
 #ifndef NDEBUG
-    cerr << "Size of thread local object " << GVar->getName()
-        << " is unknown\n";
+    errs() << "Size of thread local object " << GVar->getName()
+           << " is unknown\n";
 #endif
     llvm_unreachable(0);
   }
@@ -379,7 +379,7 @@ LowerLOAD(SDValue Op, SelectionDAG &DAG)
     return SDValue();
   }
   unsigned ABIAlignment = getTargetData()->
-    getABITypeAlignment(LD->getMemoryVT().getTypeForMVT(*DAG.getContext()));
+    getABITypeAlignment(LD->getMemoryVT().getTypeForMVT());
   // Leave aligned load alone.
   if (LD->getAlignment() >= ABIAlignment) {
     return SDValue();
@@ -474,7 +474,7 @@ LowerSTORE(SDValue Op, SelectionDAG &DAG)
     return SDValue();
   }
   unsigned ABIAlignment = getTargetData()->
-    getABITypeAlignment(ST->getMemoryVT().getTypeForMVT(*DAG.getContext()));
+    getABITypeAlignment(ST->getMemoryVT().getTypeForMVT());
   // Leave aligned store alone.
   if (ST->getAlignment() >= ABIAlignment) {
     return SDValue();
@@ -650,7 +650,7 @@ LowerCCCCallTo(SDValue Op, SelectionDAG &DAG, unsigned CC)
 
   // Analyze operands of the call, assigning locations to each operand.
   SmallVector<CCValAssign, 16> ArgLocs;
-  CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs, DAG.getContext());
+  CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs, *DAG.getContext());
 
   // The ABI dictates there should be one stack slot available to the callee
   // on function entry (for saving lr).
@@ -777,7 +777,7 @@ LowerCallResult(SDValue Chain, SDValue InFlag, CallSDNode *TheCall,
   // Assign locations to each value returned by this call.
   SmallVector<CCValAssign, 16> RVLocs;
   CCState CCInfo(CallingConv, isVarArg, getTargetMachine(),
-                 RVLocs, DAG.getContext());
+                 RVLocs, *DAG.getContext());
 
   CCInfo.AnalyzeCallResult(TheCall, RetCC_XCore);
   SmallVector<SDValue, 8> ResultVals;
@@ -833,7 +833,7 @@ LowerCCCArguments(SDValue Op, SelectionDAG &DAG)
 
   // Assign locations to all of the incoming arguments.
   SmallVector<CCValAssign, 16> ArgLocs;
-  CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs, DAG.getContext());
+  CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs, *DAG.getContext());
 
   CCInfo.AnalyzeFormalArguments(Op.getNode(), CC_XCore);
 
@@ -854,8 +854,8 @@ LowerCCCArguments(SDValue Op, SelectionDAG &DAG)
       default:
         {
 #ifndef NDEBUG
-          cerr << "LowerFORMAL_ARGUMENTS Unhandled argument type: "
-               << RegVT.getSimpleVT() << "\n";
+          errs() << "LowerFORMAL_ARGUMENTS Unhandled argument type: "
+                 << RegVT.getSimpleVT() << "\n";
 #endif
           llvm_unreachable(0);
         }
@@ -871,9 +871,9 @@ LowerCCCArguments(SDValue Op, SelectionDAG &DAG)
       // Load the argument to a virtual register
       unsigned ObjSize = VA.getLocVT().getSizeInBits()/8;
       if (ObjSize > StackSlotSize) {
-        cerr << "LowerFORMAL_ARGUMENTS Unhandled argument type: "
-             << VA.getLocVT().getSimpleVT()
-             << "\n";
+        errs() << "LowerFORMAL_ARGUMENTS Unhandled argument type: "
+               << VA.getLocVT().getSimpleVT()
+               << "\n";
       }
       // Create the frame index object for this incoming parameter...
       int FI = MFI->CreateFixedObject(ObjSize,
@@ -950,7 +950,7 @@ LowerRET(SDValue Op, SelectionDAG &DAG)
   DebugLoc dl = Op.getDebugLoc();
 
   // CCState - Info about the registers and stack slot.
-  CCState CCInfo(CC, isVarArg, getTargetMachine(), RVLocs, DAG.getContext());
+  CCState CCInfo(CC, isVarArg, getTargetMachine(), RVLocs, *DAG.getContext());
 
   // Analize return values of ISD::RET
   CCInfo.AnalyzeReturn(Op.getNode(), RetCC_XCore);
@@ -1076,7 +1076,7 @@ SDValue XCoreTargetLowering::PerformDAGCombine(SDNode *N,
       break;
     }
     unsigned ABIAlignment = getTargetData()->
-      getABITypeAlignment(ST->getMemoryVT().getTypeForMVT(*DAG.getContext()));
+      getABITypeAlignment(ST->getMemoryVT().getTypeForMVT());
     unsigned Alignment = ST->getAlignment();
     if (Alignment >= ABIAlignment) {
       break;
@@ -1125,6 +1125,11 @@ static inline bool isImmUs4(int64_t val)
 bool
 XCoreTargetLowering::isLegalAddressingMode(const AddrMode &AM, 
                                               const Type *Ty) const {
+  // Be conservative with void
+  // FIXME: Can we be more aggressive?
+  if (Ty->getTypeID() == Type::VoidTyID)
+    return false;
+
   const TargetData *TD = TM.getTargetData();
   unsigned Size = TD->getTypeAllocSize(Ty);
   if (AM.BaseGV) {