#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
using namespace llvm;
if (!isU6 && !isImmU16(Amount)) {
// FIX could emit multiple instructions in this case.
+#ifndef NDEBUG
cerr << "eliminateCallFramePseudoInstr size too big: "
<< Amount << "\n";
- abort();
+#endif
+ llvm_unreachable(0);
}
MachineInstr *New;
if (Old->getOpcode() == XCore::ADJCALLSTACKDOWN) {
int Opcode = isU6 ? XCore::EXTSP_u6 : XCore::EXTSP_lu6;
- New=BuildMI(MF, TII.get(Opcode))
+ New=BuildMI(MF, Old->getDebugLoc(), TII.get(Opcode))
.addImm(Amount);
} else {
assert(Old->getOpcode() == XCore::ADJCALLSTACKUP);
int Opcode = isU6 ? XCore::LDAWSP_ru6_RRegs : XCore::LDAWSP_lru6_RRegs;
- New=BuildMI(MF, TII.get(Opcode), XCore::SP)
+ New=BuildMI(MF, Old->getDebugLoc(), TII.get(Opcode), XCore::SP)
.addImm(Amount);
}
int SPAdj, RegScavenger *RS) const {
assert(SPAdj == 0 && "Unexpected");
MachineInstr &MI = *II;
+ DebugLoc dl = MI.getDebugLoc();
unsigned i = 0;
while (!MI.getOperand(i).isFI()) {
int StackSize = MF.getFrameInfo()->getStackSize();
#ifndef NDEBUG
- DOUT << "\nFunction : " << MF.getFunction()->getName() << "\n";
+ DEBUG(errs() << "\nFunction : "
+ << MF.getFunction()->getName() << "\n");
DOUT << "<--------->\n";
MI.print(DOUT);
DOUT << "FrameIndex : " << FrameIndex << "\n";
MachineInstr *New = 0;
if (!isUs) {
if (!RS) {
- cerr << "eliminateFrameIndex Frame size too big: " << Offset << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "eliminateFrameIndex Frame size too big: " << Offset;
+ llvm_report_error(Msg.str());
}
unsigned ScratchReg = RS->scavengeRegister(XCore::GRRegsRegisterClass, II,
SPAdj);
- loadConstant(MBB, II, ScratchReg, Offset);
+ loadConstant(MBB, II, ScratchReg, Offset, dl);
switch (MI.getOpcode()) {
case XCore::LDWFI:
- New = BuildMI(MBB, II, TII.get(XCore::LDW_3r), Reg)
+ New = BuildMI(MBB, II, dl, TII.get(XCore::LDW_3r), Reg)
.addReg(FramePtr)
- .addReg(ScratchReg, false, false, true);
+ .addReg(ScratchReg, RegState::Kill);
break;
case XCore::STWFI:
- New = BuildMI(MBB, II, TII.get(XCore::STW_3r))
- .addReg(Reg, false, false, isKill)
+ New = BuildMI(MBB, II, dl, TII.get(XCore::STW_3r))
+ .addReg(Reg, getKillRegState(isKill))
.addReg(FramePtr)
- .addReg(ScratchReg, false, false, true);
+ .addReg(ScratchReg, RegState::Kill);
break;
case XCore::LDAWFI:
- New = BuildMI(MBB, II, TII.get(XCore::LDAWF_l3r), Reg)
+ New = BuildMI(MBB, II, dl, TII.get(XCore::LDAWF_l3r), Reg)
.addReg(FramePtr)
- .addReg(ScratchReg, false, false, true);
+ .addReg(ScratchReg, RegState::Kill);
break;
default:
- assert(0 && "Unexpected Opcode\n");
+ llvm_unreachable("Unexpected Opcode");
}
} else {
switch (MI.getOpcode()) {
case XCore::LDWFI:
- New = BuildMI(MBB, II, TII.get(XCore::LDW_2rus), Reg)
+ New = BuildMI(MBB, II, dl, TII.get(XCore::LDW_2rus), Reg)
.addReg(FramePtr)
.addImm(Offset);
break;
case XCore::STWFI:
- New = BuildMI(MBB, II, TII.get(XCore::STW_2rus))
- .addReg(Reg, false, false, isKill)
+ New = BuildMI(MBB, II, dl, TII.get(XCore::STW_2rus))
+ .addReg(Reg, getKillRegState(isKill))
.addReg(FramePtr)
.addImm(Offset);
break;
case XCore::LDAWFI:
- New = BuildMI(MBB, II, TII.get(XCore::LDAWF_l2rus), Reg)
+ New = BuildMI(MBB, II, dl, TII.get(XCore::LDAWF_l2rus), Reg)
.addReg(FramePtr)
.addImm(Offset);
break;
default:
- assert(0 && "Unexpected Opcode\n");
+ llvm_unreachable("Unexpected Opcode");
}
}
} else {
bool isU6 = isImmU6(Offset);
if (!isU6 && !isImmU16(Offset)) {
- // FIXME could make this work for LDWSP, LDAWSP.
- cerr << "eliminateFrameIndex Frame size too big: " << Offset << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "eliminateFrameIndex Frame size too big: " << Offset;
+ llvm_report_error(Msg.str());
}
switch (MI.getOpcode()) {
int NewOpcode;
case XCore::LDWFI:
NewOpcode = (isU6) ? XCore::LDWSP_ru6 : XCore::LDWSP_lru6;
- BuildMI(MBB, II, TII.get(NewOpcode), Reg)
+ BuildMI(MBB, II, dl, TII.get(NewOpcode), Reg)
.addImm(Offset);
break;
case XCore::STWFI:
NewOpcode = (isU6) ? XCore::STWSP_ru6 : XCore::STWSP_lru6;
- BuildMI(MBB, II, TII.get(NewOpcode))
- .addReg(Reg, false, false, isKill)
+ BuildMI(MBB, II, dl, TII.get(NewOpcode))
+ .addReg(Reg, getKillRegState(isKill))
.addImm(Offset);
break;
case XCore::LDAWFI:
NewOpcode = (isU6) ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6;
- BuildMI(MBB, II, TII.get(NewOpcode), Reg)
+ BuildMI(MBB, II, dl, TII.get(NewOpcode), Reg)
.addImm(Offset);
break;
default:
- assert(0 && "Unexpected Opcode\n");
+ llvm_unreachable("Unexpected Opcode");
}
}
// Erase old instruction.
void XCoreRegisterInfo::
loadConstant(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
- unsigned DstReg, int64_t Value) const {
+ unsigned DstReg, int64_t Value, DebugLoc dl) const {
// TODO use mkmsk if possible.
if (!isImmU16(Value)) {
// TODO use constant pool.
- cerr << "loadConstant value too big " << Value << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "loadConstant value too big " << Value;
+ llvm_report_error(Msg.str());
}
int Opcode = isImmU6(Value) ? XCore::LDC_ru6 : XCore::LDC_lru6;
- BuildMI(MBB, I, TII.get(Opcode), DstReg).addImm(Value);
+ BuildMI(MBB, I, dl, TII.get(Opcode), DstReg).addImm(Value);
}
void XCoreRegisterInfo::
storeToStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
- unsigned SrcReg, int Offset) const {
+ unsigned SrcReg, int Offset, DebugLoc dl) const {
assert(Offset%4 == 0 && "Misaligned stack offset");
Offset/=4;
bool isU6 = isImmU6(Offset);
if (!isU6 && !isImmU16(Offset)) {
- cerr << "storeToStack offset too big " << Offset << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "storeToStack offset too big " << Offset;
+ llvm_report_error(Msg.str());
}
int Opcode = isU6 ? XCore::STWSP_ru6 : XCore::STWSP_lru6;
- BuildMI(MBB, I, TII.get(Opcode))
+ BuildMI(MBB, I, dl, TII.get(Opcode))
.addReg(SrcReg)
.addImm(Offset);
}
void XCoreRegisterInfo::
loadFromStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
- unsigned DstReg, int Offset) const {
+ unsigned DstReg, int Offset, DebugLoc dl) const {
assert(Offset%4 == 0 && "Misaligned stack offset");
Offset/=4;
bool isU6 = isImmU6(Offset);
if (!isU6 && !isImmU16(Offset)) {
- cerr << "storeToStack offset too big " << Offset << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "loadFromStack offset too big " << Offset;
+ llvm_report_error(Msg.str());
}
int Opcode = isU6 ? XCore::LDWSP_ru6 : XCore::LDWSP_lru6;
- BuildMI(MBB, I, TII.get(Opcode), DstReg)
+ BuildMI(MBB, I, dl, TII.get(Opcode), DstReg)
.addImm(Offset);
}
MachineFrameInfo *MFI = MF.getFrameInfo();
MachineModuleInfo *MMI = MFI->getMachineModuleInfo();
XCoreFunctionInfo *XFI = MF.getInfo<XCoreFunctionInfo>();
+ DebugLoc dl = (MBBI != MBB.end() ?
+ MBBI->getDebugLoc() : DebugLoc::getUnknownLoc());
bool FP = hasFP(MF);
if (!isU6 && !isImmU16(FrameSize)) {
// FIXME could emit multiple instructions.
- cerr << "emitPrologue Frame size too big: " << FrameSize << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "emitPrologue Frame size too big: " << FrameSize;
+ llvm_report_error(Msg.str());
}
bool emitFrameMoves = needsFrameMoves(MF);
} else {
Opcode = (isU6) ? XCore::EXTSP_u6 : XCore::EXTSP_lu6;
}
- BuildMI(MBB, MBBI, TII.get(Opcode)).addImm(FrameSize);
+ BuildMI(MBB, MBBI, dl, TII.get(Opcode)).addImm(FrameSize);
if (emitFrameMoves) {
std::vector<MachineMove> &Moves = MMI->getFrameMoves();
// Show update of SP.
unsigned FrameLabelId = MMI->NextLabelID();
- BuildMI(MBB, MBBI, TII.get(XCore::DBG_LABEL)).addImm(FrameLabelId);
+ BuildMI(MBB, MBBI, dl, TII.get(XCore::DBG_LABEL)).addImm(FrameLabelId);
MachineLocation SPDst(MachineLocation::VirtualFP);
MachineLocation SPSrc(MachineLocation::VirtualFP, -FrameSize * 4);
}
if (saveLR) {
int LRSpillOffset = MFI->getObjectOffset(XFI->getLRSpillSlot());
- storeToStack(MBB, MBBI, XCore::LR, LRSpillOffset + FrameSize*4);
+ storeToStack(MBB, MBBI, XCore::LR, LRSpillOffset + FrameSize*4, dl);
MBB.addLiveIn(XCore::LR);
if (emitFrameMoves) {
unsigned SaveLRLabelId = MMI->NextLabelID();
- BuildMI(MBB, MBBI, TII.get(XCore::DBG_LABEL)).addImm(SaveLRLabelId);
+ BuildMI(MBB, MBBI, dl, TII.get(XCore::DBG_LABEL)).addImm(SaveLRLabelId);
MachineLocation CSDst(MachineLocation::VirtualFP, LRSpillOffset);
MachineLocation CSSrc(XCore::LR);
MMI->getFrameMoves().push_back(MachineMove(SaveLRLabelId,
if (FP) {
// Save R10 to the stack.
int FPSpillOffset = MFI->getObjectOffset(XFI->getFPSpillSlot());
- storeToStack(MBB, MBBI, XCore::R10, FPSpillOffset + FrameSize*4);
+ storeToStack(MBB, MBBI, XCore::R10, FPSpillOffset + FrameSize*4, dl);
// R10 is live-in. It is killed at the spill.
MBB.addLiveIn(XCore::R10);
if (emitFrameMoves) {
unsigned SaveR10LabelId = MMI->NextLabelID();
- BuildMI(MBB, MBBI, TII.get(XCore::DBG_LABEL)).addImm(SaveR10LabelId);
+ BuildMI(MBB, MBBI, dl, TII.get(XCore::DBG_LABEL)).addImm(SaveR10LabelId);
MachineLocation CSDst(MachineLocation::VirtualFP, FPSpillOffset);
MachineLocation CSSrc(XCore::R10);
MMI->getFrameMoves().push_back(MachineMove(SaveR10LabelId,
}
// Set the FP from the SP.
unsigned FramePtr = XCore::R10;
- BuildMI(MBB, MBBI, TII.get(XCore::LDAWSP_ru6), FramePtr)
+ BuildMI(MBB, MBBI, dl, TII.get(XCore::LDAWSP_ru6), FramePtr)
.addImm(0);
if (emitFrameMoves) {
// Show FP is now valid.
unsigned FrameLabelId = MMI->NextLabelID();
- BuildMI(MBB, MBBI, TII.get(XCore::DBG_LABEL)).addImm(FrameLabelId);
+ BuildMI(MBB, MBBI, dl, TII.get(XCore::DBG_LABEL)).addImm(FrameLabelId);
MachineLocation SPDst(FramePtr);
MachineLocation SPSrc(MachineLocation::VirtualFP);
MMI->getFrameMoves().push_back(MachineMove(FrameLabelId, SPDst, SPSrc));
MachineBasicBlock &MBB) const {
MachineFrameInfo *MFI = MF.getFrameInfo();
MachineBasicBlock::iterator MBBI = prior(MBB.end());
+ DebugLoc dl = MBBI->getDebugLoc();
bool FP = hasFP(MF);
if (FP) {
// Restore the stack pointer.
unsigned FramePtr = XCore::R10;
- BuildMI(MBB, MBBI, TII.get(XCore::SETSP_1r))
+ BuildMI(MBB, MBBI, dl, TII.get(XCore::SETSP_1r))
.addReg(FramePtr);
}
if (!isU6 && !isImmU16(FrameSize)) {
// FIXME could emit multiple instructions.
- cerr << "emitEpilogue Frame size too big: " << FrameSize << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "emitEpilogue Frame size too big: " << FrameSize;
+ llvm_report_error(Msg.str());
}
if (FrameSize) {
// Restore R10
int FPSpillOffset = MFI->getObjectOffset(XFI->getFPSpillSlot());
FPSpillOffset += FrameSize*4;
- loadFromStack(MBB, MBBI, XCore::R10, FPSpillOffset);
+ loadFromStack(MBB, MBBI, XCore::R10, FPSpillOffset, dl);
}
bool restoreLR = XFI->getUsesLR();
if (restoreLR && MFI->getObjectOffset(XFI->getLRSpillSlot()) != 0) {
int LRSpillOffset = MFI->getObjectOffset(XFI->getLRSpillSlot());
LRSpillOffset += FrameSize*4;
- loadFromStack(MBB, MBBI, XCore::LR, LRSpillOffset);
+ loadFromStack(MBB, MBBI, XCore::LR, LRSpillOffset, dl);
restoreLR = false;
}
if (restoreLR) {
assert(MBBI->getOpcode() == XCore::RETSP_u6
|| MBBI->getOpcode() == XCore::RETSP_lu6);
int Opcode = (isU6) ? XCore::RETSP_u6 : XCore::RETSP_lu6;
- BuildMI(MBB, MBBI, TII.get(Opcode)).addImm(FrameSize);
+ BuildMI(MBB, MBBI, dl, TII.get(Opcode)).addImm(FrameSize);
MBB.erase(MBBI);
} else {
int Opcode = (isU6) ? XCore::LDAWSP_ru6_RRegs : XCore::LDAWSP_lru6_RRegs;
- BuildMI(MBB, MBBI, TII.get(Opcode), XCore::SP).addImm(FrameSize);
+ BuildMI(MBB, MBBI, dl, TII.get(Opcode), XCore::SP).addImm(FrameSize);
}
}
}
projects / oota-llvm.git / blobdiff