#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
using namespace llvm;
if (!isU6 && !isImmU16(Amount)) {
// FIX could emit multiple instructions in this case.
- cerr << "eliminateCallFramePseudoInstr size too big: "
- << Amount << "\n";
- abort();
+#ifndef NDEBUG
+ errs() << "eliminateCallFramePseudoInstr size too big: "
+ << Amount << "\n";
+#endif
+ llvm_unreachable(0);
}
MachineInstr *New;
MBB.erase(I);
}
-void XCoreRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
- int SPAdj, RegScavenger *RS) const {
+unsigned
+XCoreRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
+ int SPAdj, int *Value,
+ RegScavenger *RS) const {
assert(SPAdj == 0 && "Unexpected");
MachineInstr &MI = *II;
DebugLoc dl = MI.getDebugLoc();
int StackSize = MF.getFrameInfo()->getStackSize();
#ifndef NDEBUG
- DOUT << "\nFunction : " << MF.getFunction()->getName() << "\n";
- DOUT << "<--------->\n";
- MI.print(DOUT);
- DOUT << "FrameIndex : " << FrameIndex << "\n";
- DOUT << "FrameOffset : " << Offset << "\n";
- DOUT << "StackSize : " << StackSize << "\n";
+ DEBUG(errs() << "\nFunction : "
+ << MF.getFunction()->getName() << "\n");
+ DEBUG(errs() << "<--------->\n");
+ DEBUG(MI.print(errs()));
+ DEBUG(errs() << "FrameIndex : " << FrameIndex << "\n");
+ DEBUG(errs() << "FrameOffset : " << Offset << "\n");
+ DEBUG(errs() << "StackSize : " << StackSize << "\n");
#endif
Offset += StackSize;
assert(Offset%4 == 0 && "Misaligned stack offset");
- #ifndef NDEBUG
- DOUT << "Offset : " << Offset << "\n";
- DOUT << "<--------->\n";
- #endif
+ DEBUG(errs() << "Offset : " << Offset << "\n" << "<--------->\n");
Offset/=4;
bool isUs = isImmUs(Offset);
unsigned FramePtr = XCore::R10;
- MachineInstr *New = 0;
if (!isUs) {
if (!RS) {
- cerr << "eliminateFrameIndex Frame size too big: " << Offset << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "eliminateFrameIndex Frame size too big: " << Offset;
+ llvm_report_error(Msg.str());
}
unsigned ScratchReg = RS->scavengeRegister(XCore::GRRegsRegisterClass, II,
SPAdj);
loadConstant(MBB, II, ScratchReg, Offset, dl);
switch (MI.getOpcode()) {
case XCore::LDWFI:
- New = BuildMI(MBB, II, dl, TII.get(XCore::LDW_3r), Reg)
+ BuildMI(MBB, II, dl, TII.get(XCore::LDW_3r), Reg)
.addReg(FramePtr)
.addReg(ScratchReg, RegState::Kill);
break;
case XCore::STWFI:
- New = BuildMI(MBB, II, dl, TII.get(XCore::STW_3r))
+ BuildMI(MBB, II, dl, TII.get(XCore::STW_3r))
.addReg(Reg, getKillRegState(isKill))
.addReg(FramePtr)
.addReg(ScratchReg, RegState::Kill);
break;
case XCore::LDAWFI:
- New = BuildMI(MBB, II, dl, TII.get(XCore::LDAWF_l3r), Reg)
+ BuildMI(MBB, II, dl, TII.get(XCore::LDAWF_l3r), Reg)
.addReg(FramePtr)
.addReg(ScratchReg, RegState::Kill);
break;
default:
- assert(0 && "Unexpected Opcode\n");
+ llvm_unreachable("Unexpected Opcode");
}
} else {
switch (MI.getOpcode()) {
case XCore::LDWFI:
- New = BuildMI(MBB, II, dl, TII.get(XCore::LDW_2rus), Reg)
+ BuildMI(MBB, II, dl, TII.get(XCore::LDW_2rus), Reg)
.addReg(FramePtr)
.addImm(Offset);
break;
case XCore::STWFI:
- New = BuildMI(MBB, II, dl, TII.get(XCore::STW_2rus))
+ BuildMI(MBB, II, dl, TII.get(XCore::STW_2rus))
.addReg(Reg, getKillRegState(isKill))
.addReg(FramePtr)
.addImm(Offset);
break;
case XCore::LDAWFI:
- New = BuildMI(MBB, II, dl, TII.get(XCore::LDAWF_l2rus), Reg)
+ BuildMI(MBB, II, dl, TII.get(XCore::LDAWF_l2rus), Reg)
.addReg(FramePtr)
.addImm(Offset);
break;
default:
- assert(0 && "Unexpected Opcode\n");
+ llvm_unreachable("Unexpected Opcode");
}
}
} else {
bool isU6 = isImmU6(Offset);
if (!isU6 && !isImmU16(Offset)) {
- // FIXME could make this work for LDWSP, LDAWSP.
- cerr << "eliminateFrameIndex Frame size too big: " << Offset << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "eliminateFrameIndex Frame size too big: " << Offset;
+ llvm_report_error(Msg.str());
}
switch (MI.getOpcode()) {
.addImm(Offset);
break;
default:
- assert(0 && "Unexpected Opcode\n");
+ llvm_unreachable("Unexpected Opcode");
}
}
// Erase old instruction.
MBB.erase(II);
+ return 0;
}
void
int FrameIdx;
if (! isVarArg) {
// A fixed offset of 0 allows us to save / restore LR using entsp / retsp.
- FrameIdx = MFI->CreateFixedObject(RC->getSize(), 0);
+ FrameIdx = MFI->CreateFixedObject(RC->getSize(), 0, true, false);
} else {
- FrameIdx = MFI->CreateStackObject(RC->getSize(), RC->getAlignment());
+ FrameIdx = MFI->CreateStackObject(RC->getSize(), RC->getAlignment(),
+ false);
}
XFI->setUsesLR(FrameIdx);
XFI->setLRSpillSlot(FrameIdx);
if (requiresRegisterScavenging(MF)) {
// Reserve a slot close to SP or frame pointer.
RS->setScavengingFrameIndex(MFI->CreateStackObject(RC->getSize(),
- RC->getAlignment()));
+ RC->getAlignment(),
+ false));
}
if (hasFP(MF)) {
// A callee save register is used to hold the FP.
// This needs saving / restoring in the epilogue / prologue.
XFI->setFPSpillSlot(MFI->CreateStackObject(RC->getSize(),
- RC->getAlignment()));
+ RC->getAlignment(),
+ false));
}
}
// TODO use mkmsk if possible.
if (!isImmU16(Value)) {
// TODO use constant pool.
- cerr << "loadConstant value too big " << Value << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "loadConstant value too big " << Value;
+ llvm_report_error(Msg.str());
}
int Opcode = isImmU6(Value) ? XCore::LDC_ru6 : XCore::LDC_lru6;
BuildMI(MBB, I, dl, TII.get(Opcode), DstReg).addImm(Value);
Offset/=4;
bool isU6 = isImmU6(Offset);
if (!isU6 && !isImmU16(Offset)) {
- cerr << "storeToStack offset too big " << Offset << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "storeToStack offset too big " << Offset;
+ llvm_report_error(Msg.str());
}
int Opcode = isU6 ? XCore::STWSP_ru6 : XCore::STWSP_lru6;
BuildMI(MBB, I, dl, TII.get(Opcode))
Offset/=4;
bool isU6 = isImmU6(Offset);
if (!isU6 && !isImmU16(Offset)) {
- cerr << "loadFromStack offset too big " << Offset << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "loadFromStack offset too big " << Offset;
+ llvm_report_error(Msg.str());
}
int Opcode = isU6 ? XCore::LDWSP_ru6 : XCore::LDWSP_lru6;
BuildMI(MBB, I, dl, TII.get(Opcode), DstReg)
if (!isU6 && !isImmU16(FrameSize)) {
// FIXME could emit multiple instructions.
- cerr << "emitPrologue Frame size too big: " << FrameSize << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "emitPrologue Frame size too big: " << FrameSize;
+ llvm_report_error(Msg.str());
}
bool emitFrameMoves = needsFrameMoves(MF);
if (!isU6 && !isImmU16(FrameSize)) {
// FIXME could emit multiple instructions.
- cerr << "emitEpilogue Frame size too big: " << FrameSize << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "emitEpilogue Frame size too big: " << FrameSize;
+ llvm_report_error(Msg.str());
}
if (FrameSize) {
return XCoreGenRegisterInfo::getDwarfRegNumFull(RegNum, 0);
}
-unsigned XCoreRegisterInfo::getFrameRegister(MachineFunction &MF) const {
+unsigned XCoreRegisterInfo::getFrameRegister(const MachineFunction &MF) const {
bool FP = hasFP(MF);
return FP ? XCore::R10 : XCore::SP;