#include "llvm/Transforms/Scalar.h"
#include "llvm/ADT/MapVector.h"
#include "llvm/ADT/SCCIterator.h"
+#include "llvm/Analysis/LoopInfo.h"
#include "llvm/Analysis/RegionInfo.h"
#include "llvm/Analysis/RegionIterator.h"
#include "llvm/Analysis/RegionPass.h"
Region *ParentRegion;
DominatorTree *DT;
+ LoopInfo *LI;
RNVector Order;
BBSet Visited;
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequiredID(LowerSwitchID);
AU.addRequired<DominatorTreeWrapperPass>();
+ AU.addRequired<LoopInfo>();
AU.addPreserved<DominatorTreeWrapperPass>();
RegionPass::getAnalysisUsage(AU);
}
for (unsigned i = 0, e = Term->getNumSuccessors(); i != e; ++i) {
BasicBlock *Succ = Term->getSuccessor(i);
- if (Visited.count(Succ))
+ if (Visited.count(Succ) && LI->isLoopHeader(Succ) ) {
Loops[Succ] = BB;
+ }
}
}
}
BBPredicates &Pred = Predicates[BB];
BBPredicates &LPred = LoopPreds[BB];
- for (BasicBlock *Predecessor : predecessors(BB)) {
+ for (pred_iterator PI = pred_begin(BB), PE = pred_end(BB);
+ PI != PE; ++PI) {
+
// Ignore it if it's a branch from outside into our region entry
- if (!ParentRegion->contains(Predecessor))
+ if (!ParentRegion->contains(*PI))
continue;
- Region *R = RI->getRegionFor(Predecessor);
+ Region *R = RI->getRegionFor(*PI);
if (R == ParentRegion) {
// It's a top level block in our region
- BranchInst *Term = cast<BranchInst>(Predecessor->getTerminator());
+ BranchInst *Term = cast<BranchInst>((*PI)->getTerminator());
for (unsigned i = 0, e = Term->getNumSuccessors(); i != e; ++i) {
BasicBlock *Succ = Term->getSuccessor(i);
if (Succ != BB)
continue;
- if (Visited.count(Predecessor)) {
+ if (Visited.count(*PI)) {
// Normal forward edge
if (Term->isConditional()) {
// Try to treat it like an ELSE block
BasicBlock *Other = Term->getSuccessor(!i);
if (Visited.count(Other) && !Loops.count(Other) &&
- !Pred.count(Other) && !Pred.count(Predecessor)) {
+ !Pred.count(Other) && !Pred.count(*PI)) {
Pred[Other] = BoolFalse;
- Pred[Predecessor] = BoolTrue;
+ Pred[*PI] = BoolTrue;
continue;
}
}
- Pred[Predecessor] = buildCondition(Term, i, false);
+ Pred[*PI] = buildCondition(Term, i, false);
} else {
// Back edge
- LPred[Predecessor] = buildCondition(Term, i, true);
+ LPred[*PI] = buildCondition(Term, i, true);
}
}
if (!Term)
return;
- for (BasicBlock *Succ : successors(BB))
- delPhiValues(BB, Succ);
+ for (succ_iterator SI = succ_begin(BB), SE = succ_end(BB);
+ SI != SE; ++SI) {
+
+ delPhiValues(BB, *SI);
+ }
Term->eraseFromParent();
}
BasicBlock *Dominator = nullptr;
// Find all the edges from the sub region to the exit
- for (BasicBlock *BB : predecessors(OldExit)) {
+ for (pred_iterator I = pred_begin(OldExit), E = pred_end(OldExit);
+ I != E;) {
+
+ BasicBlock *BB = *I++;
if (!SubRegion->contains(BB))
continue;
ParentRegion = R;
DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree();
+ LI = &getAnalysis<LoopInfo>();
orderNodes();
collectInfos();