//
// The LLVM Compiler Infrastructure
//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
-// The LowerSwitch transformation rewrites switch statements with a sequence of
-// branches, which allows targets to get away with not implementing the switch
-// statement until it is convenient.
+// The LowerSwitch transformation rewrites switch instructions with a sequence
+// of branches, which allows targets to get away with not implementing the
+// switch instruction until it is convenient.
//
//===----------------------------------------------------------------------===//
#include "llvm/Constants.h"
#include "llvm/Function.h"
#include "llvm/Instructions.h"
+#include "llvm/LLVMContext.h"
#include "llvm/Pass.h"
+#include "llvm/ADT/STLExtras.h"
+#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
-#include "llvm/ADT/Statistic.h"
+#include "llvm/Support/raw_ostream.h"
#include <algorithm>
-#include <iostream>
using namespace llvm;
namespace {
- Statistic<> NumLowered("lowerswitch", "Number of SwitchInst's replaced");
-
/// LowerSwitch Pass - Replace all SwitchInst instructions with chained branch
/// instructions. Note that this cannot be a BasicBlock pass because it
/// modifies the CFG!
class LowerSwitch : public FunctionPass {
public:
+ static char ID; // Pass identification, replacement for typeid
+ LowerSwitch() : FunctionPass(&ID) {}
+
virtual bool runOnFunction(Function &F);
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
- // This is a cluster of orthogonal Transforms
+ // This is a cluster of orthogonal Transforms
AU.addPreserved<UnifyFunctionExitNodes>();
AU.addPreservedID(PromoteMemoryToRegisterID);
- AU.addPreservedID(LowerSelectID);
AU.addPreservedID(LowerInvokePassID);
- AU.addPreservedID(LowerAllocationsID);
}
-
- typedef std::pair<Constant*, BasicBlock*> Case;
- typedef std::vector<Case>::iterator CaseItr;
+
+ struct CaseRange {
+ Constant* Low;
+ Constant* High;
+ BasicBlock* BB;
+
+ CaseRange() : Low(0), High(0), BB(0) { }
+ CaseRange(Constant* low, Constant* high, BasicBlock* bb) :
+ Low(low), High(high), BB(bb) { }
+ };
+
+ typedef std::vector<CaseRange> CaseVector;
+ typedef std::vector<CaseRange>::iterator CaseItr;
private:
void processSwitchInst(SwitchInst *SI);
BasicBlock* switchConvert(CaseItr Begin, CaseItr End, Value* Val,
BasicBlock* OrigBlock, BasicBlock* Default);
- BasicBlock* newLeafBlock(Case& Leaf, Value* Val,
+ BasicBlock* newLeafBlock(CaseRange& Leaf, Value* Val,
BasicBlock* OrigBlock, BasicBlock* Default);
+ unsigned Clusterify(CaseVector& Cases, SwitchInst *SI);
};
/// The comparison function for sorting the switch case values in the vector.
+ /// WARNING: Case ranges should be disjoint!
struct CaseCmp {
- bool operator () (const LowerSwitch::Case& C1,
- const LowerSwitch::Case& C2) {
- if (const ConstantUInt* U1 = dyn_cast<const ConstantUInt>(C1.first))
- return U1->getValue() < cast<const ConstantUInt>(C2.first)->getValue();
+ bool operator () (const LowerSwitch::CaseRange& C1,
+ const LowerSwitch::CaseRange& C2) {
- const ConstantSInt* S1 = dyn_cast<const ConstantSInt>(C1.first);
- return S1->getValue() < cast<const ConstantSInt>(C2.first)->getValue();
+ const ConstantInt* CI1 = cast<const ConstantInt>(C1.Low);
+ const ConstantInt* CI2 = cast<const ConstantInt>(C2.High);
+ return CI1->getValue().slt(CI2->getValue());
}
};
-
- RegisterOpt<LowerSwitch>
- X("lowerswitch", "Lower SwitchInst's to branches");
}
+char LowerSwitch::ID = 0;
+static RegisterPass<LowerSwitch>
+X("lowerswitch", "Lower SwitchInst's to branches");
+
// Publically exposed interface to pass...
-const PassInfo *llvm::LowerSwitchID = X.getPassInfo();
+const PassInfo *const llvm::LowerSwitchID = &X;
// createLowerSwitchPass - Interface to this file...
FunctionPass *llvm::createLowerSwitchPass() {
return new LowerSwitch();
// operator<< - Used for debugging purposes.
//
-std::ostream& operator<<(std::ostream &O,
- const std::vector<LowerSwitch::Case> &C) {
+static raw_ostream& operator<<(raw_ostream &O,
+ const LowerSwitch::CaseVector &C) ATTRIBUTE_USED;
+static raw_ostream& operator<<(raw_ostream &O,
+ const LowerSwitch::CaseVector &C) {
O << "[";
- for (std::vector<LowerSwitch::Case>::const_iterator B = C.begin(),
+ for (LowerSwitch::CaseVector::const_iterator B = C.begin(),
E = C.end(); B != E; ) {
- O << *B->first;
+ O << *B->Low << " -" << *B->High;
if (++B != E) O << ", ";
}
return newLeafBlock(*Begin, Val, OrigBlock, Default);
unsigned Mid = Size / 2;
- std::vector<Case> LHS(Begin, Begin + Mid);
- DEBUG(std::cerr << "LHS: " << LHS << "\n");
- std::vector<Case> RHS(Begin + Mid, End);
- DEBUG(std::cerr << "RHS: " << RHS << "\n");
+ std::vector<CaseRange> LHS(Begin, Begin + Mid);
+ DEBUG(dbgs() << "LHS: " << LHS << "\n");
+ std::vector<CaseRange> RHS(Begin + Mid, End);
+ DEBUG(dbgs() << "RHS: " << RHS << "\n");
- Case& Pivot = *(Begin + Mid);
- DEBUG(std::cerr << "Pivot ==> "
- << (int64_t)cast<ConstantInt>(Pivot.first)->getRawValue()
- << "\n");
+ CaseRange& Pivot = *(Begin + Mid);
+ DEBUG(dbgs() << "Pivot ==> "
+ << cast<ConstantInt>(Pivot.Low)->getValue() << " -"
+ << cast<ConstantInt>(Pivot.High)->getValue() << "\n");
BasicBlock* LBranch = switchConvert(LHS.begin(), LHS.end(), Val,
OrigBlock, Default);
// Create a new node that checks if the value is < pivot. Go to the
// left branch if it is and right branch if not.
Function* F = OrigBlock->getParent();
- BasicBlock* NewNode = new BasicBlock("NodeBlock");
- F->getBasicBlockList().insert(OrigBlock->getNext(), NewNode);
+ BasicBlock* NewNode = BasicBlock::Create(Val->getContext(), "NodeBlock");
+ Function::iterator FI = OrigBlock;
+ F->getBasicBlockList().insert(++FI, NewNode);
- SetCondInst* Comp = new SetCondInst(Instruction::SetLT, Val, Pivot.first,
- "Pivot");
+ ICmpInst* Comp = new ICmpInst(ICmpInst::ICMP_SLT,
+ Val, Pivot.Low, "Pivot");
NewNode->getInstList().push_back(Comp);
- new BranchInst(LBranch, RBranch, Comp, NewNode);
+ BranchInst::Create(LBranch, RBranch, Comp, NewNode);
return NewNode;
}
// can't be another valid case value, so the jump to the "default" branch
// is warranted.
//
-BasicBlock* LowerSwitch::newLeafBlock(Case& Leaf, Value* Val,
+BasicBlock* LowerSwitch::newLeafBlock(CaseRange& Leaf, Value* Val,
BasicBlock* OrigBlock,
BasicBlock* Default)
{
Function* F = OrigBlock->getParent();
- BasicBlock* NewLeaf = new BasicBlock("LeafBlock");
- F->getBasicBlockList().insert(OrigBlock->getNext(), NewLeaf);
-
- // Make the seteq instruction...
- SetCondInst* Comp = new SetCondInst(Instruction::SetEQ, Val,
- Leaf.first, "SwitchLeaf");
- NewLeaf->getInstList().push_back(Comp);
+ BasicBlock* NewLeaf = BasicBlock::Create(Val->getContext(), "LeafBlock");
+ Function::iterator FI = OrigBlock;
+ F->getBasicBlockList().insert(++FI, NewLeaf);
+
+ // Emit comparison
+ ICmpInst* Comp = NULL;
+ if (Leaf.Low == Leaf.High) {
+ // Make the seteq instruction...
+ Comp = new ICmpInst(*NewLeaf, ICmpInst::ICMP_EQ, Val,
+ Leaf.Low, "SwitchLeaf");
+ } else {
+ // Make range comparison
+ if (cast<ConstantInt>(Leaf.Low)->isMinValue(true /*isSigned*/)) {
+ // Val >= Min && Val <= Hi --> Val <= Hi
+ Comp = new ICmpInst(*NewLeaf, ICmpInst::ICMP_SLE, Val, Leaf.High,
+ "SwitchLeaf");
+ } else if (cast<ConstantInt>(Leaf.Low)->isZero()) {
+ // Val >= 0 && Val <= Hi --> Val <=u Hi
+ Comp = new ICmpInst(*NewLeaf, ICmpInst::ICMP_ULE, Val, Leaf.High,
+ "SwitchLeaf");
+ } else {
+ // Emit V-Lo <=u Hi-Lo
+ Constant* NegLo = ConstantExpr::getNeg(Leaf.Low);
+ Instruction* Add = BinaryOperator::CreateAdd(Val, NegLo,
+ Val->getName()+".off",
+ NewLeaf);
+ Constant *UpperBound = ConstantExpr::getAdd(NegLo, Leaf.High);
+ Comp = new ICmpInst(*NewLeaf, ICmpInst::ICMP_ULE, Add, UpperBound,
+ "SwitchLeaf");
+ }
+ }
// Make the conditional branch...
- BasicBlock* Succ = Leaf.second;
- new BranchInst(Succ, Default, Comp, NewLeaf);
+ BasicBlock* Succ = Leaf.BB;
+ BranchInst::Create(Succ, Default, Comp, NewLeaf);
// If there were any PHI nodes in this successor, rewrite one entry
// from OrigBlock to come from NewLeaf.
for (BasicBlock::iterator I = Succ->begin(); isa<PHINode>(I); ++I) {
PHINode* PN = cast<PHINode>(I);
+ // Remove all but one incoming entries from the cluster
+ uint64_t Range = cast<ConstantInt>(Leaf.High)->getSExtValue() -
+ cast<ConstantInt>(Leaf.Low)->getSExtValue();
+ for (uint64_t j = 0; j < Range; ++j) {
+ PN->removeIncomingValue(OrigBlock);
+ }
+
int BlockIdx = PN->getBasicBlockIndex(OrigBlock);
assert(BlockIdx != -1 && "Switch didn't go to this successor??");
PN->setIncomingBlock((unsigned)BlockIdx, NewLeaf);
return NewLeaf;
}
+// Clusterify - Transform simple list of Cases into list of CaseRange's
+unsigned LowerSwitch::Clusterify(CaseVector& Cases, SwitchInst *SI) {
+ unsigned numCmps = 0;
+
+ // Start with "simple" cases
+ for (unsigned i = 1; i < SI->getNumSuccessors(); ++i)
+ Cases.push_back(CaseRange(SI->getSuccessorValue(i),
+ SI->getSuccessorValue(i),
+ SI->getSuccessor(i)));
+ std::sort(Cases.begin(), Cases.end(), CaseCmp());
+
+ // Merge case into clusters
+ if (Cases.size()>=2)
+ for (CaseItr I=Cases.begin(), J=llvm::next(Cases.begin()); J!=Cases.end(); ) {
+ int64_t nextValue = cast<ConstantInt>(J->Low)->getSExtValue();
+ int64_t currentValue = cast<ConstantInt>(I->High)->getSExtValue();
+ BasicBlock* nextBB = J->BB;
+ BasicBlock* currentBB = I->BB;
+
+ // If the two neighboring cases go to the same destination, merge them
+ // into a single case.
+ if ((nextValue-currentValue==1) && (currentBB == nextBB)) {
+ I->High = J->High;
+ J = Cases.erase(J);
+ } else {
+ I = J++;
+ }
+ }
+
+ for (CaseItr I=Cases.begin(), E=Cases.end(); I!=E; ++I, ++numCmps) {
+ if (I->Low != I->High)
+ // A range counts double, since it requires two compares.
+ ++numCmps;
+ }
+
+ return numCmps;
+}
+
// processSwitchInst - Replace the specified switch instruction with a sequence
// of chained if-then insts in a balanced binary search.
//
// If there is only the default destination, don't bother with the code below.
if (SI->getNumOperands() == 2) {
- new BranchInst(SI->getDefaultDest(), CurBlock);
+ BranchInst::Create(SI->getDefaultDest(), CurBlock);
CurBlock->getInstList().erase(SI);
return;
}
// Create a new, empty default block so that the new hierarchy of
// if-then statements go to this and the PHI nodes are happy.
- BasicBlock* NewDefault = new BasicBlock("NewDefault");
+ BasicBlock* NewDefault = BasicBlock::Create(SI->getContext(), "NewDefault");
F->getBasicBlockList().insert(Default, NewDefault);
- new BranchInst(Default, NewDefault);
+ BranchInst::Create(Default, NewDefault);
// If there is an entry in any PHI nodes for the default edge, make sure
// to update them as well.
PN->setIncomingBlock((unsigned)BlockIdx, NewDefault);
}
- std::vector<Case> Cases;
+ // Prepare cases vector.
+ CaseVector Cases;
+ unsigned numCmps = Clusterify(Cases, SI);
- // Expand comparisons for all of the non-default cases...
- for (unsigned i = 1; i < SI->getNumSuccessors(); ++i)
- Cases.push_back(Case(SI->getSuccessorValue(i), SI->getSuccessor(i)));
-
- std::sort(Cases.begin(), Cases.end(), CaseCmp());
- DEBUG(std::cerr << "Cases: " << Cases << "\n");
+ DEBUG(dbgs() << "Clusterify finished. Total clusters: " << Cases.size()
+ << ". Total compares: " << numCmps << "\n");
+ DEBUG(dbgs() << "Cases: " << Cases << "\n");
+ (void)numCmps;
+
BasicBlock* SwitchBlock = switchConvert(Cases.begin(), Cases.end(), Val,
OrigBlock, NewDefault);
// Branch to our shiny new if-then stuff...
- new BranchInst(SwitchBlock, OrigBlock);
+ BranchInst::Create(SwitchBlock, OrigBlock);
// We are now done with the switch instruction, delete it.
CurBlock->getInstList().erase(SI);