add feature gpio

[lede.git] / target / linux / ramips / files / arch / mips / ralink / rt305x / rt305x.c

diff --git a/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c b/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c
index 831db84c73f54ae208f65bed275381ce86c64467..8a7a58b7d57574c94c8e6dd32df735ac9fb76fef 100644 (file)
--- a/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c
+++ b/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c
@@ -26,6 +26,40 @@ void __iomem * rt305x_sysc_base;
 void __iomem * rt305x_memc_base;
 enum rt305x_soc_type rt305x_soc;
 
+static unsigned long rt5350_get_mem_size(void)
+{
+       void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT305X_SYSC_BASE);
+       unsigned long ret;
+       u32 t;
+
+       t = __raw_readl(sysc + SYSC_REG_SYSTEM_CONFIG);
+       t = (t >> RT5350_SYSCFG0_DRAM_SIZE_SHIFT) &
+           RT5350_SYSCFG0_DRAM_SIZE_MASK;
+
+       switch (t) {
+       case RT5350_SYSCFG0_DRAM_SIZE_2M:
+               ret = 2 * 1024 * 1024;
+               break;
+       case RT5350_SYSCFG0_DRAM_SIZE_8M:
+               ret = 8 * 1024 * 1024;
+               break;
+       case RT5350_SYSCFG0_DRAM_SIZE_16M:
+               ret = 16 * 1024 * 1024;
+               break;
+       case RT5350_SYSCFG0_DRAM_SIZE_32M:
+               ret = 32 * 1024 * 1024;
+               break;
+       case RT5350_SYSCFG0_DRAM_SIZE_64M:
+               ret = 64 * 1024 * 1024;
+               break;
+       default:
+               panic("rt5350: invalid DRAM size: %u", t);
+               break;
+       }
+
+       return ret;
+}
+
 void __init ramips_soc_prom_init(void)
 {
        void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT305X_SYSC_BASE);
@@ -54,6 +88,9 @@ void __init ramips_soc_prom_init(void)
        } else if (n0 == RT3352_CHIP_NAME0 && n1 == RT3352_CHIP_NAME1) {
                rt305x_soc = RT305X_SOC_RT3352;
                name = "RT3352";
+       } else if (n0 == RT5350_CHIP_NAME0 && n1 == RT5350_CHIP_NAME1) {
+               rt305x_soc = RT305X_SOC_RT5350;
+               name = "RT5350";
        } else {
                panic("rt305x: unknown SoC, n0:%08x n1:%08x\n", n0, n1);
        }
@@ -67,8 +104,18 @@ void __init ramips_soc_prom_init(void)
                (id & CHIP_ID_REV_MASK));
 
        ramips_mem_base = RT305X_SDRAM_BASE;
-       ramips_mem_size_min = RT305X_MEM_SIZE_MIN;
-       ramips_mem_size_max = RT305X_MEM_SIZE_MAX;
+
+       if (soc_is_rt5350()) {
+               ramips_get_mem_size = rt5350_get_mem_size;
+       } else if (soc_is_rt305x() || soc_is_rt3350() ) {
+               ramips_mem_size_min = RT305X_MEM_SIZE_MIN;
+               ramips_mem_size_max = RT305X_MEM_SIZE_MAX;
+       } else if (soc_is_rt3352()) {
+               ramips_mem_size_min = RT3352_MEM_SIZE_MIN;
+               ramips_mem_size_max = RT3352_MEM_SIZE_MAX;
+       } else {
+               BUG();
+       }
 }
 
 static struct ramips_gpio_chip rt305x_gpio_chips[] = {