The BLX instruction is encoded differently than the BL, because why not? In

[oota-llvm.git] / test / Analysis / BasicAA / modref.ll

diff --git a/test/Analysis/BasicAA/modref.ll b/test/Analysis/BasicAA/modref.ll
index 4a616364b00bcc13587ceaae02530b423c57eeed..54d10e7b72dfdaae9b5272413ac88f952c9cb8b2 100644 (file)
--- a/test/Analysis/BasicAA/modref.ll
+++ b/test/Analysis/BasicAA/modref.ll
@@ -85,11 +85,11 @@ define void @test3a(i8* %P, i8 %X) {
   %Y = add i8 %X, 1     ;; Dead, because the only use (the store) is dead.
   
   %P2 = getelementptr i8* %P, i32 2
-  store i8 %Y, i8* %P2  ;; FIXME: Killed by llvm.lifetime.end, should be zapped.
-; CHECK: store i8 %Y, i8* %P2
+  store i8 %Y, i8* %P2
+; CHECK-NEXT: call void @llvm.lifetime.end
   call void @llvm.lifetime.end(i64 10, i8* %P)
   ret void
-; CHECK: ret void
+; CHECK-NEXT: ret void
 }
 
 @G1 = external global i32
@@ -103,7 +103,7 @@ define i32 @test4(i8* %P) {
   ret i32 %sub
 ; CHECK: @test4
 ; CHECK: load i32* @G
-; CHECK: memset.i32
+; CHECK: memset.p0i8.i32
 ; CHECK-NOT: load
 ; CHECK: sub i32 %tmp, %tmp
 }
@@ -118,8 +118,19 @@ define i32 @test5(i8* %P, i32 %Len) {
   ret i32 %sub
 ; CHECK: @test5
 ; CHECK: load i32* @G
-; CHECK: memcpy.i32
+; CHECK: memcpy.p0i8.p0i8.i32
 ; CHECK-NOT: load
 ; CHECK: sub i32 %tmp, %tmp
 }
 
+define i8 @test6(i8* %p, i8* noalias %a) {
+  %x = load i8* %a
+  %t = va_arg i8* %p, float
+  %y = load i8* %a
+  %z = add i8 %x, %y
+  ret i8 %z
+; CHECK: @test6
+; CHECK: load i8* %a
+; CHECK-NOT: load
+; CHECK: ret
+}