The ARM disassembler did not handle the alignment correctly for VLD*DUP* instructions

[oota-llvm.git] / test / Assembler / unnamed.ll

diff --git a/test/Assembler/unnamed.ll b/test/Assembler/unnamed.ll
index 31f1b581c5da20a5a2ff7c9c5d407a01b794209e..fb4fa6244e5af6a416bef8b246f90a58afb14452 100644 (file)
--- a/test/Assembler/unnamed.ll
+++ b/test/Assembler/unnamed.ll
@@ -1,12 +1,18 @@
 ; RUN: llvm-as < %s | llvm-dis
 
-%0 = type { %1, %2 }                              ; type %0
-%1 = type { i32 }                                 ; type %1
-%2 = type { float, double }                       ; type %2
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+
+module asm "this is an inline asm block"
+module asm "this is another inline asm block"
+
+%0 = type { %1, %2 }
+%1 = type { i32 }
+%2 = type { float, double }
 
 @0 = global i32 0
 @1 = global float 3.0
 @2 = global i8* null
+@3 = global x86_fp80 0xK4001E000000000000000
 
 define float @foo(%0* %p) nounwind {
   %t = load %0* %p                                ; <%0> [#uses=2]
@@ -40,3 +46,6 @@ define float* @rrr() {
 define i8** @sss() {
   ret i8** @2
 }
+define x86_fp80* @nnn() {
+  ret x86_fp80* @3
+}