[Hexagon] Use A2_tfrsi for constant pool and jump table addresses

[oota-llvm.git] / test / CodeGen / AArch64 / PBQP-coalesce-benefit.ll

diff --git a/test/CodeGen/AArch64/PBQP-coalesce-benefit.ll b/test/CodeGen/AArch64/PBQP-coalesce-benefit.ll
index e5d2d1ce13a422638a787ee07b4dc92bd6f5e4fa..bd50b2d84b74273490f76107f704b3b2b6217d89 100644 (file)
--- a/test/CodeGen/AArch64/PBQP-coalesce-benefit.ll
+++ b/test/CodeGen/AArch64/PBQP-coalesce-benefit.ll
@@ -3,11 +3,11 @@
 ; CHECK-LABEL: test:
 define i32 @test(i32 %acc, i32* nocapture readonly %c) {
 entry:
-  %0 = load i32* %c, align 4
+  %0 = load i32, i32* %c, align 4
 ; CHECK-NOT: mov        w{{[0-9]*}}, w0
   %add = add nsw i32 %0, %acc
   %arrayidx1 = getelementptr inbounds i32, i32* %c, i64 1
-  %1 = load i32* %arrayidx1, align 4
+  %1 = load i32, i32* %arrayidx1, align 4
   %add2 = add nsw i32 %add, %1
   ret i32 %add2
 }