[Hexagon] Use A2_tfrsi for constant pool and jump table addresses

[oota-llvm.git] / test / CodeGen / AArch64 / arm64-fast-isel-conversion.ll

diff --git a/test/CodeGen/AArch64/arm64-fast-isel-conversion.ll b/test/CodeGen/AArch64/arm64-fast-isel-conversion.ll
index ca8ab2cb50411cf19a3b0855d96c3abea73ef067..1b68865233116705454ab83557e73383625c643a 100644 (file)
--- a/test/CodeGen/AArch64/arm64-fast-isel-conversion.ll
+++ b/test/CodeGen/AArch64/arm64-fast-isel-conversion.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O0 -fast-isel-abort -mtriple=arm64-apple-darwin -mcpu=cyclone | FileCheck %s
+; RUN: llc -O0 -fast-isel-abort=1 -verify-machineinstrs -mtriple=arm64-apple-darwin -mcpu=cyclone < %s | FileCheck %s
 
 ;; Test various conversions.
 define zeroext i32 @trunc_(i8 zeroext %a, i16 zeroext %b, i32 %c, i64 %d) nounwind ssp {
@@ -17,7 +17,6 @@ entry:
 ; CHECK: ldrh w0, [sp, #12]
 ; CHECK: strb w0, [sp, #15]
 ; CHECK: ldrb w0, [sp, #15]
-; CHECK: uxtb w0, w0
 ; CHECK: add sp, sp, #16
 ; CHECK: ret
   %a.addr = alloca i8, align 1
@@ -28,16 +27,16 @@ entry:
   store i16 %b, i16* %b.addr, align 2
   store i32 %c, i32* %c.addr, align 4
   store i64 %d, i64* %d.addr, align 8
-  %tmp = load i64* %d.addr, align 8
+  %tmp = load i64, i64* %d.addr, align 8
   %conv = trunc i64 %tmp to i32
   store i32 %conv, i32* %c.addr, align 4
-  %tmp1 = load i32* %c.addr, align 4
+  %tmp1 = load i32, i32* %c.addr, align 4
   %conv2 = trunc i32 %tmp1 to i16
   store i16 %conv2, i16* %b.addr, align 2
-  %tmp3 = load i16* %b.addr, align 2
+  %tmp3 = load i16, i16* %b.addr, align 2
   %conv4 = trunc i16 %tmp3 to i8
   store i8 %conv4, i8* %a.addr, align 1
-  %tmp5 = load i8* %a.addr, align 1
+  %tmp5 = load i8, i8* %a.addr, align 1
   %conv6 = zext i8 %tmp5 to i32
   ret i32 %conv6
 }
@@ -51,14 +50,11 @@ entry:
 ; CHECK: str w2, [sp, #8]
 ; CHECK: str x3, [sp]
 ; CHECK: ldrb w0, [sp, #15]
-; CHECK: uxtb w0, w0
 ; CHECK: strh w0, [sp, #12]
 ; CHECK: ldrh w0, [sp, #12]
-; CHECK: uxth w0, w0
 ; CHECK: str w0, [sp, #8]
 ; CHECK: ldr w0, [sp, #8]
 ; CHECK: mov x3, x0
-; CHECK: ubfx x3, x3, #0, #32
 ; CHECK: str x3, [sp]
 ; CHECK: ldr x0, [sp]
 ; CHECK: ret
@@ -70,16 +66,16 @@ entry:
   store i16 %b, i16* %b.addr, align 2
   store i32 %c, i32* %c.addr, align 4
   store i64 %d, i64* %d.addr, align 8
-  %tmp = load i8* %a.addr, align 1
+  %tmp = load i8, i8* %a.addr, align 1
   %conv = zext i8 %tmp to i16
   store i16 %conv, i16* %b.addr, align 2
-  %tmp1 = load i16* %b.addr, align 2
+  %tmp1 = load i16, i16* %b.addr, align 2
   %conv2 = zext i16 %tmp1 to i32
   store i32 %conv2, i32* %c.addr, align 4
-  %tmp3 = load i32* %c.addr, align 4
+  %tmp3 = load i32, i32* %c.addr, align 4
   %conv4 = zext i32 %tmp3 to i64
   store i64 %conv4, i64* %d.addr, align 8
-  %tmp5 = load i64* %d.addr, align 8
+  %tmp5 = load i64, i64* %d.addr, align 8
   ret i64 %tmp5
 }
 
@@ -109,15 +105,11 @@ entry:
 ; CHECK: strh w1, [sp, #12]
 ; CHECK: str w2, [sp, #8]
 ; CHECK: str x3, [sp]
-; CHECK: ldrb w0, [sp, #15]
-; CHECK: sxtb w0, w0
+; CHECK: ldrsb w0, [sp, #15]
 ; CHECK: strh w0, [sp, #12]
-; CHECK: ldrh w0, [sp, #12]
-; CHECK: sxth w0, w0
+; CHECK: ldrsh w0, [sp, #12]
 ; CHECK: str w0, [sp, #8]
-; CHECK: ldr w0, [sp, #8]
-; CHECK: mov x3, x0
-; CHECK: sxtw x3, w3
+; CHECK: ldrsw x3, [sp, #8]
 ; CHECK: str x3, [sp]
 ; CHECK: ldr x0, [sp]
 ; CHECK: ret
@@ -129,16 +121,16 @@ entry:
   store i16 %b, i16* %b.addr, align 2
   store i32 %c, i32* %c.addr, align 4
   store i64 %d, i64* %d.addr, align 8
-  %tmp = load i8* %a.addr, align 1
+  %tmp = load i8, i8* %a.addr, align 1
   %conv = sext i8 %tmp to i16
   store i16 %conv, i16* %b.addr, align 2
-  %tmp1 = load i16* %b.addr, align 2
+  %tmp1 = load i16, i16* %b.addr, align 2
   %conv2 = sext i16 %tmp1 to i32
   store i32 %conv2, i32* %c.addr, align 4
-  %tmp3 = load i32* %c.addr, align 4
+  %tmp3 = load i32, i32* %c.addr, align 4
   %conv4 = sext i32 %tmp3 to i64
   store i64 %conv4, i64* %d.addr, align 8
-  %tmp5 = load i64* %d.addr, align 8
+  %tmp5 = load i64, i64* %d.addr, align 8
   ret i64 %tmp5
 }
 
@@ -417,7 +409,7 @@ define void @stack_trunc() nounwind {
 ; CHECK: add  sp, sp, #16
   %a = alloca i8, align 1
   %b = alloca i64, align 8
-  %c = load i64* %b, align 8
+  %c = load i64, i64* %b, align 8
   %d = trunc i64 %c to i8
   store i8 %d, i8* %a, align 1
   ret void