-; RUN: llc -O0 -fast-isel-abort -mtriple=arm64-apple-darwin < %s | FileCheck %s
+; RUN: llc -O0 -fast-isel-abort=1 -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s
define i32 @icmp_eq_imm(i32 %a) nounwind ssp {
entry:
ret i32 %conv
}
+define i32 @icmp_eq_ptr(i8* %a) {
+entry:
+; CHECK-LABEL: icmp_eq_ptr
+; CHECK: cmp x0, #0
+; CHECK-NEXT: cset {{.+}}, eq
+ %cmp = icmp eq i8* %a, null
+ %conv = zext i1 %cmp to i32
+ ret i32 %conv
+}
+
+define i32 @icmp_ne_ptr(i8* %a) {
+entry:
+; CHECK-LABEL: icmp_ne_ptr
+; CHECK: cmp x0, #0
+; CHECK-NEXT: cset {{.+}}, ne
+ %cmp = icmp ne i8* %a, null
+ %conv = zext i1 %cmp to i32
+ ret i32 %conv
+}
+
define i32 @icmp_ugt(i32 %a, i32 %b) nounwind ssp {
entry:
; CHECK-LABEL: icmp_ugt
ret i32 %conv2
}
+define i32 @icmp_i1_signed(i1 %a, i1 %b) nounwind {
+entry:
+; CHECK-LABEL: icmp_i1_signed
+; CHECK: sbfx [[REG1:w[0-9]+]], w0, #0, #1
+; CHECK-NEXT: sbfx [[REG2:w[0-9]+]], w1, #0, #1
+; CHECK-NEXT: cmp [[REG1]], [[REG2]]
+; CHECK-NEXT: cset w0, gt
+ %cmp = icmp sgt i1 %a, %b
+ %conv2 = zext i1 %cmp to i32
+ ret i32 %conv2
+}
define i32 @icmp_i16_signed_const(i16 %a) nounwind {
entry: