[AArch64] Fix sext/zext folding in address arithmetic.

[oota-llvm.git] / test / CodeGen / AArch64 / arm64-fast-isel-ret.ll

diff --git a/test/CodeGen/AArch64/arm64-fast-isel-ret.ll b/test/CodeGen/AArch64/arm64-fast-isel-ret.ll
index d91fd285d551459d500fe8c54e3b12140886e80e..1f6a60e77cc34eeb151126a7b544c02492c0f41c 100644 (file)
--- a/test/CodeGen/AArch64/arm64-fast-isel-ret.ll
+++ b/test/CodeGen/AArch64/arm64-fast-isel-ret.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O0 -fast-isel-abort -mtriple=arm64-apple-darwin | FileCheck %s
+; RUN: llc -O0 -fast-isel-abort=1 -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s
 
 ;; Test returns.
 define void @t0() nounwind ssp {
@@ -16,7 +16,7 @@ entry:
 ; CHECK: ret
   %a.addr = alloca i32, align 4
   store i32 %a, i32* %a.addr, align 4
-  %tmp = load i32* %a.addr, align 4
+  %tmp = load i32, i32* %a.addr, align 4
   ret i32 %tmp
 }
 
@@ -28,7 +28,7 @@ entry:
 ; CHECK: ret
   %a.addr = alloca i64, align 8
   store i64 %a, i64* %a.addr, align 8
-  %tmp = load i64* %a.addr, align 8
+  %tmp = load i64, i64* %a.addr, align 8
   ret i64 %tmp
 }
 
@@ -38,7 +38,7 @@ entry:
 ; CHECK: sxth  w0, w0
   %a.addr = alloca i16, align 1
   store i16 %a, i16* %a.addr, align 1
-  %0 = load i16* %a.addr, align 1
+  %0 = load i16, i16* %a.addr, align 1
   ret i16 %0
 }
 
@@ -48,7 +48,7 @@ entry:
 ; CHECK: sxtb  w0, w0
   %a.addr = alloca i8, align 1
   store i8 %a, i8* %a.addr, align 1
-  %0 = load i8* %a.addr, align 1
+  %0 = load i8, i8* %a.addr, align 1
   ret i8 %0
 }
 
@@ -58,6 +58,6 @@ entry:
 ; CHECK: and w0, w0, #0x1
   %a.addr = alloca i1, align 1
   store i1 %a, i1* %a.addr, align 1
-  %0 = load i1* %a.addr, align 1
+  %0 = load i1, i1* %a.addr, align 1
   ret i1 %0
 }