[AArch64] Don't assert when combining (v3f32 select (setcc f64)).

[oota-llvm.git] / test / CodeGen / AArch64 / arm64-fast-isel.ll

diff --git a/test/CodeGen/AArch64/arm64-fast-isel.ll b/test/CodeGen/AArch64/arm64-fast-isel.ll
index 8ce6091d9260175f859229103f2360493d9c3e3d..a4d08f9016a02befba8c9eeb4b1c4f66c1083ef7 100644 (file)
--- a/test/CodeGen/AArch64/arm64-fast-isel.ll
+++ b/test/CodeGen/AArch64/arm64-fast-isel.ll
@@ -9,7 +9,7 @@ entry:
 ; CHECK: ret
   %a.addr = alloca i32, align 4
   store i32 %a, i32* %a.addr
-  %tmp = load i32* %a.addr
+  %tmp = load i32, i32* %a.addr
   store i32 %tmp, i32* %a.addr
   ret void
 }
@@ -22,7 +22,7 @@ define void @t1(i64 %a) nounwind {
 ; CHECK: ret
   %a.addr = alloca i64, align 4
   store i64 %a, i64* %a.addr
-  %tmp = load i64* %a.addr
+  %tmp = load i64, i64* %a.addr
   store i64 %tmp, i64* %a.addr
   ret void
 }
@@ -39,7 +39,7 @@ entry:
 ; CHECK: ret
   %a.addr = alloca i1, align 1
   store i1 %a, i1* %a.addr, align 1
-  %0 = load i1* %a.addr, align 1
+  %0 = load i1, i1* %a.addr, align 1
   ret i1 %0
 }
 
@@ -49,7 +49,7 @@ entry:
 ; CHECK: ldur w0, [x0, #-4]
 ; CHECK: ret
   %0 = getelementptr i32, i32 *%ptr, i32 -1
-  %1 = load i32* %0, align 4
+  %1 = load i32, i32* %0, align 4
   ret i32 %1
 }
 
@@ -59,7 +59,7 @@ entry:
 ; CHECK: ldur w0, [x0, #-256]
 ; CHECK: ret
   %0 = getelementptr i32, i32 *%ptr, i32 -64
-  %1 = load i32* %0, align 4
+  %1 = load i32, i32* %0, align 4
   ret i32 %1
 }