[Hexagon] Use A2_tfrsi for constant pool and jump table addresses

[oota-llvm.git] / test / CodeGen / AArch64 / arm64-triv-disjoint-mem-access.ll

diff --git a/test/CodeGen/AArch64/arm64-triv-disjoint-mem-access.ll b/test/CodeGen/AArch64/arm64-triv-disjoint-mem-access.ll
index a7f52159e51ddd65a8d6cf2aa5e7a1c86df8a575..1b1681dc49f312da0727761e8693664b7ab8f241 100644 (file)
--- a/test/CodeGen/AArch64/arm64-triv-disjoint-mem-access.ll
+++ b/test/CodeGen/AArch64/arm64-triv-disjoint-mem-access.ll
@@ -8,11 +8,11 @@ define i32 @func(i32 %i, i32 %j, i32 %k) #0 {
 entry:
 ; CHECK: ldr {{w[0-9]+}}, [x[[REG:[0-9]+]], #4]
 ; CHECK: str {{w[0-9]+}}, [x[[REG]], #8]
-  %0 = load i32** @a, align 8, !tbaa !1
-  %arrayidx = getelementptr inbounds i32* %0, i64 2
+  %0 = load i32*, i32** @a, align 8, !tbaa !1
+  %arrayidx = getelementptr inbounds i32, i32* %0, i64 2
   store i32 %i, i32* %arrayidx, align 4, !tbaa !5
-  %arrayidx1 = getelementptr inbounds i32* %0, i64 1
-  %1 = load i32* %arrayidx1, align 4, !tbaa !5
+  %arrayidx1 = getelementptr inbounds i32, i32* %0, i64 1
+  %1 = load i32, i32* %arrayidx1, align 4, !tbaa !5
   %add = add nsw i32 %k, %i
   store i32 %add, i32* @m, align 4, !tbaa !5
   ret i32 %1
@@ -22,10 +22,10 @@ attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"=
 
 !llvm.ident = !{!0}
 
-!0 = metadata !{metadata !"clang version 3.6.0 "}
-!1 = metadata !{metadata !2, metadata !2, i64 0}
-!2 = metadata !{metadata !"any pointer", metadata !3, i64 0}
-!3 = metadata !{metadata !"omnipotent char", metadata !4, i64 0}
-!4 = metadata !{metadata !"Simple C/C++ TBAA"}
-!5 = metadata !{metadata !6, metadata !6, i64 0}
-!6 = metadata !{metadata !"int", metadata !3, i64 0}
+!0 = !{!"clang version 3.6.0 "}
+!1 = !{!2, !2, i64 0}
+!2 = !{!"any pointer", !3, i64 0}
+!3 = !{!"omnipotent char", !4, i64 0}
+!4 = !{!"Simple C/C++ TBAA"}
+!5 = !{!6, !6, i64 0}
+!6 = !{!"int", !3, i64 0}