[AArch64] Don't assert when combining (v3f32 select (setcc f64)).

[oota-llvm.git] / test / CodeGen / AArch64 / arm64-trunc-store.ll

diff --git a/test/CodeGen/AArch64/arm64-trunc-store.ll b/test/CodeGen/AArch64/arm64-trunc-store.ll
index cf15247e15241ef35eae398ddf93401d30ac6584..7cde629b33ae46a98f7392f887614a8c4022be37 100644 (file)
--- a/test/CodeGen/AArch64/arm64-trunc-store.ll
+++ b/test/CodeGen/AArch64/arm64-trunc-store.ll
@@ -25,10 +25,10 @@ define void @fct32(i32 %arg, i64 %var) {
 ; CHECK-NEXT: str w1, {{\[}}[[GLOBALADDR]], w[[OFFSETREGNUM]], sxtw #2]
 ; CHECK-NEXT: ret
 bb:
-  %.pre37 = load i32** @zptr32, align 8
+  %.pre37 = load i32*, i32** @zptr32, align 8
   %dec = add nsw i32 %arg, -1
   %idxprom8 = sext i32 %dec to i64
-  %arrayidx9 = getelementptr inbounds i32* %.pre37, i64 %idxprom8
+  %arrayidx9 = getelementptr inbounds i32, i32* %.pre37, i64 %idxprom8
   %tmp = trunc i64 %var to i32
   store i32 %tmp, i32* %arrayidx9, align 4
   ret void
@@ -45,10 +45,10 @@ define void @fct16(i32 %arg, i64 %var) {
 ; CHECK-NEXT: strh w1, {{\[}}[[GLOBALADDR]], w[[OFFSETREGNUM]], sxtw #1]
 ; CHECK-NEXT: ret
 bb:
-  %.pre37 = load i16** @zptr16, align 8
+  %.pre37 = load i16*, i16** @zptr16, align 8
   %dec = add nsw i32 %arg, -1
   %idxprom8 = sext i32 %dec to i64
-  %arrayidx9 = getelementptr inbounds i16* %.pre37, i64 %idxprom8
+  %arrayidx9 = getelementptr inbounds i16, i16* %.pre37, i64 %idxprom8
   %tmp = trunc i64 %var to i16
   store i16 %tmp, i16* %arrayidx9, align 4
   ret void
@@ -65,10 +65,10 @@ define void @fct8(i32 %arg, i64 %var) {
 ; CHECK-NEXT: sturb w1, {{\[}}[[ADDR]], #-1]
 ; CHECK-NEXT: ret
 bb:
-  %.pre37 = load i8** @zptr8, align 8
+  %.pre37 = load i8*, i8** @zptr8, align 8
   %dec = add nsw i32 %arg, -1
   %idxprom8 = sext i32 %dec to i64
-  %arrayidx9 = getelementptr inbounds i8* %.pre37, i64 %idxprom8
+  %arrayidx9 = getelementptr inbounds i8, i8* %.pre37, i64 %idxprom8
   %tmp = trunc i64 %var to i8
   store i8 %tmp, i8* %arrayidx9, align 4
   ret void