[AArch64] Don't assert when combining (v3f32 select (setcc f64)).

[oota-llvm.git] / test / CodeGen / AArch64 / dp-3source.ll

diff --git a/test/CodeGen/AArch64/dp-3source.ll b/test/CodeGen/AArch64/dp-3source.ll
index bd96ec728f52d32450f064f00d70b4e77567e386..3982fea95d6c2cb54d173801218359bf9ca99efc 100644 (file)
--- a/test/CodeGen/AArch64/dp-3source.ll
+++ b/test/CodeGen/AArch64/dp-3source.ll
@@ -168,8 +168,8 @@ define i64 @test_umnegl(i32 %lhs, i32 %rhs) {
 
 define void @test_mneg(){
 ; CHECK-LABEL: test_mneg:
-  %1 = load i32* @a, align 4
-  %2 = load i32* @b, align 4
+  %1 = load i32, i32* @a, align 4
+  %2 = load i32, i32* @b, align 4
   %3 = sub i32 0, %1
   %4 = mul i32 %2, %3
   store i32 %4, i32* @c, align 4