[Hexagon] Use A2_tfrsi for constant pool and jump table addresses

[oota-llvm.git] / test / CodeGen / AArch64 / fp16-vector-load-store.ll

diff --git a/test/CodeGen/AArch64/fp16-vector-load-store.ll b/test/CodeGen/AArch64/fp16-vector-load-store.ll
index edbbffe001c5e6f5c3452182db4b239b582a22cc..b71b39f1acd1ff41a48fcaad8c7f64ab658bd6ca 100644 (file)
--- a/test/CodeGen/AArch64/fp16-vector-load-store.ll
+++ b/test/CodeGen/AArch64/fp16-vector-load-store.ll
@@ -5,7 +5,7 @@ define <4 x half> @load_64(<4 x half>* nocapture readonly %a) #0 {
 ; CHECK-LABEL: load_64:
 ; CHECK: ldr d0, [x0]
 entry:
-  %0 = load <4 x half>* %a, align 8
+  %0 = load <4 x half>, <4 x half>* %a, align 8
   ret <4 x half> %0
 }
 
@@ -14,7 +14,7 @@ define <8 x half> @load_128(<8 x half>* nocapture readonly %a) #0 {
 ; CHECK-LABEL: load_128:
 ; CHECK: ldr q0, [x0]
 entry:
-  %0 = load <8 x half>* %a, align 16
+  %0 = load <8 x half>, <8 x half>* %a, align 16
   ret <8 x half> %0
 }
 
@@ -23,7 +23,7 @@ define <4 x half> @load_dup_64(half* nocapture readonly %a) #0 {
 ; CHECK-LABEL: load_dup_64:
 ; CHECK: ld1r { v0.4h }, [x0]
 entry:
-  %0 = load half* %a, align 2
+  %0 = load half, half* %a, align 2
   %1 = insertelement <4 x half> undef, half %0, i32 0
   %2 = shufflevector <4 x half> %1, <4 x half> undef, <4 x i32> zeroinitializer
   ret <4 x half> %2
@@ -34,7 +34,7 @@ define <8 x half> @load_dup_128(half* nocapture readonly %a) #0 {
 ; CHECK-LABEL: load_dup_128:
 ; CHECK: ld1r { v0.8h }, [x0]
 entry:
-  %0 = load half* %a, align 2
+  %0 = load half, half* %a, align 2
   %1 = insertelement <8 x half> undef, half %0, i32 0
   %2 = shufflevector <8 x half> %1, <8 x half> undef, <8 x i32> zeroinitializer
   ret <8 x half> %2
@@ -45,7 +45,7 @@ define <4 x half> @load_lane_64(half* nocapture readonly %a, <4 x half> %b) #0 {
 ; CHECK-LABEL: load_lane_64:
 ; CHECK: ld1 { v0.h }[2], [x0]
 entry:
-  %0 = load half* %a, align 2
+  %0 = load half, half* %a, align 2
   %1 = insertelement <4 x half> %b, half %0, i32 2
   ret <4 x half> %1
 }
@@ -55,7 +55,7 @@ define <8 x half> @load_lane_128(half* nocapture readonly %a, <8 x half> %b) #0
 ; CHECK-LABEL: load_lane_128:
 ; CHECK: ld1 { v0.h }[5], [x0]
 entry:
-  %0 = load half* %a, align 2
+  %0 = load half, half* %a, align 2
   %1 = insertelement <8 x half> %b, half %0, i32 5
   ret <8 x half> %1
 }