Fix the testcase in r246790

[oota-llvm.git] / test / CodeGen / AArch64 / logical_shifted_reg.ll

diff --git a/test/CodeGen/AArch64/logical_shifted_reg.ll b/test/CodeGen/AArch64/logical_shifted_reg.ll
index bbbfcc1b9118e74619643bfa637f6366586ae458..6b3246d1db8b8b0d9a6176bb86f797837dde12b0 100644 (file)
--- a/test/CodeGen/AArch64/logical_shifted_reg.ll
+++ b/test/CodeGen/AArch64/logical_shifted_reg.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -O0 | FileCheck %s
+; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
 
 @var1_32 = global i32 0
 @var2_32 = global i32 0
@@ -6,10 +6,10 @@
 @var1_64 = global i64 0
 @var2_64 = global i64 0
 
-define void @logical_32bit() {
-; CHECK: logical_32bit:
-  %val1 = load i32* @var1_32
-  %val2 = load i32* @var2_32
+define void @logical_32bit() minsize {
+; CHECK-LABEL: logical_32bit:
+  %val1 = load i32, i32* @var1_32
+  %val2 = load i32, i32* @var2_32
 
   ; First check basic and/bic/or/orn/eor/eon patterns with no shift
   %neg_val2 = xor i32 -1, %val2
@@ -96,10 +96,10 @@ define void @logical_32bit() {
   ret void
 }
 
-define void @logical_64bit() {
-; CHECK: logical_64bit:
-  %val1 = load i64* @var1_64
-  %val2 = load i64* @var2_64
+define void @logical_64bit() minsize {
+; CHECK-LABEL: logical_64bit:
+  %val1 = load i64, i64* @var1_64
+  %val2 = load i64, i64* @var2_64
 
   ; First check basic and/bic/or/orn/eor/eon patterns with no shift
   %neg_val2 = xor i64 -1, %val2
@@ -190,9 +190,9 @@ define void @logical_64bit() {
 }
 
 define void @flag_setting() {
-; CHECK: flag_setting:
-  %val1 = load i64* @var1_64
-  %val2 = load i64* @var2_64
+; CHECK-LABEL: flag_setting:
+  %val1 = load i64, i64* @var1_64
+  %val2 = load i64, i64* @var2_64
 
 ; CHECK: tst {{x[0-9]+}}, {{x[0-9]+}}
 ; CHECK: b.gt .L