The ARM disassembler did not handle the alignment correctly for VLD*DUP* instructions

[oota-llvm.git] / test / CodeGen / ARM / 2009-06-12-RegScavengerAssert.ll

diff --git a/test/CodeGen/ARM/2009-06-12-RegScavengerAssert.ll b/test/CodeGen/ARM/2009-06-12-RegScavengerAssert.ll
index 45b4bd48f51613d6fad867121b5637200a1d2086..27888d75f67a58f6b2650355238f59dc992e26d3 100644 (file)
--- a/test/CodeGen/ARM/2009-06-12-RegScavengerAssert.ll
+++ b/test/CodeGen/ARM/2009-06-12-RegScavengerAssert.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -mtriple=armv6-apple-darwin
+; RUN: llc < %s -mtriple=armv6-apple-darwin
 
        type { i32, i32, %struct.D_Sym**, [3 x %struct.D_Sym*] }                ; type %0
        type { i32, %struct.D_Reduction** }             ; type %1