The ARM disassembler did not handle the alignment correctly for VLD*DUP* instructions

[oota-llvm.git] / test / CodeGen / ARM / 2009-06-22-CoalescerBug.ll

diff --git a/test/CodeGen/ARM/2009-06-22-CoalescerBug.ll b/test/CodeGen/ARM/2009-06-22-CoalescerBug.ll
index e068be74bae46f32aa86be13b3c6d94f3ab82aa3..7e9b066984f9ea72d6cf1f6e1ff384457ee9468b 100644 (file)
--- a/test/CodeGen/ARM/2009-06-22-CoalescerBug.ll
+++ b/test/CodeGen/ARM/2009-06-22-CoalescerBug.ll
@@ -3,7 +3,7 @@
        %struct.rtunion = type { i64 }
        %struct.rtx_def = type { i16, i8, i8, [1 x %struct.rtunion] }
 
-define arm_apcscc void @simplify_unary_real(i8* nocapture %p) nounwind {
+define void @simplify_unary_real(i8* nocapture %p) nounwind {
 entry:
        %tmp121 = load i64* null, align 4               ; <i64> [#uses=1]
        %0 = getelementptr %struct.rtx_def* null, i32 0, i32 3, i32 3, i32 0            ; <i64*> [#uses=1]