The ARM disassembler did not handle the alignment correctly for VLD*DUP* instructions

[oota-llvm.git] / test / CodeGen / ARM / 2009-08-29-TooLongSplat.ll

diff --git a/test/CodeGen/ARM/2009-08-29-TooLongSplat.ll b/test/CodeGen/ARM/2009-08-29-TooLongSplat.ll
index 3b1413bee389e8a01e4171f64ab80f090d7405a8..4655962978dcd1d9e0dcf22b10aa5badbeea74f4 100644 (file)
--- a/test/CodeGen/ARM/2009-08-29-TooLongSplat.ll
+++ b/test/CodeGen/ARM/2009-08-29-TooLongSplat.ll
@@ -1,8 +1,8 @@
-; RUN: llvm-as < %s | llc -mattr=+neon
+; RUN: llc < %s -mattr=+neon
 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
 target triple = "thumbv7-elf"
 
-define arm_apcscc void @aaa() nounwind {
+define void @aaa() nounwind {
 entry:
   %0 = fmul <4 x float> undef, <float 1.000000e+00, float 1.000000e+01, float 1.000000e+02, float 0x3EB0C6F7A0000000> ; <<4 x float>> [#uses=1]
   %tmp31 = extractelement <4 x float> %0, i32 0   ; <float> [#uses=1]